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RE: [Xen-users] xen over quemu OR quemu in Xen domU on a system with HVM

To: "Igor Chubin" <igor@xxxxxxx>, "Mark Williamson" <mark.williamson@xxxxxxxxxxxx>
Subject: RE: [Xen-users] xen over quemu OR quemu in Xen domU on a system with HVM-capable CPU
From: "Petersson, Mats" <Mats.Petersson@xxxxxxx>
Date: Thu, 31 May 2007 11:50:59 +0200
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Thread-topic: [Xen-users] xen over quemu OR quemu in Xen domU on a system with HVM-capable CPU

> -----Original Message-----
> From: Igor Chubin [mailto:igor@xxxxxxx] 
> Sent: 31 May 2007 07:35
> To: Mark Williamson
> Cc: xen-users@xxxxxxxxxxxxxxxxxxx; Igor Chubin; Petersson, Mats
> Subject: Re: [Xen-users] xen over quemu OR quemu in Xen domU 
> on a system with HVM-capable CPU
> On Do, Mai 31, 2007 at 02:48:40 +0100, Mark Williamson wrote:
> > > Thank you for your help.
> > > And please, excuse me my bad English.
> > >
> > > I'll try to clarify what I want.
> > >
> > > Example.
> > >
> > > I can run FreeBSD inside quemu, but I can't run FreeBSD
> > > (especially legacy FreeBSD, e.g. FreeBSD 5)
> > > inside Xen domain.
> > > Even on HVM capable machines.
> > > (as far as I know proble is related to loader and big real mode).
> > 
> > Ah.  I have an AMD-V box that works with FreeBSD 6 OK...  
> Are you running on 
> > an Intel VT-x box?
> > 
> Yes.
> At this moment I use Intel VT-x box for my experiments
> (Hewlett-Packard DL380 G5 to be more precise).
> But I can change my hardware if I'll have good reasons for this.
> The fact that FreeBSD runs in Xen domU's on hosts with AMD CPUs, 
> but not run on hosts with Intel CPUs is very serious, as for me.
> (May it be that the main reason why FreeBSD runs on one system [AMD]
> but does not want to run on another [Intel] is not CPU, but BIOS or
> something else?)

HVM domains do not use the BIOS in the machine they are running on at
all, so any BIOS difference should be completely ignored. 

In this particular case, I'm pretty sure the reason why it doesn't work
is that Intel's VT doesn't support real-mode guests. Instead, they
emulate realmode in VM86 mode (so the processor is in protected 32-bit
mode, but running 16-bit real-mode style code). This works as long as
the instructions aren't "ring 0" instructions - when these instructions
are seen, they trap with a GP-fault. This is then handled in the
VMXassist code that emulates the relevant instruction. This is also
fine. The problem occurs when a transition is made from real mode to
protected mode and back again, where the registers (particular segment
registers) need to be preserved - you can't do that in VM86 mode! So
registers set in protected mode are "reset" when re-entering real-mode.
This makes "big real mode" tricks fail [big real mode is really just
going into protected mode, setting a segment to base=0, limit =
0xFFFFFFFF, and returning to real-mode - this allows real-mode code to
access all of the first 4GB of memory without any problems, rather than
being limited to 1MB]. Big real-mode is used by many boot-loaders. 

So as a conclusion, the difference here is the internal architecture of
the processor. AMD choose the "clever way", I think. 


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