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RE: [Xen-ia64-devel] vIOSAPIC and IRQs delivery

To: "Tristan Gingold" <Tristan.Gingold@xxxxxxxx>, "Tian, Kevin" <kevin.tian@xxxxxxxxx>, "Luck, Tony" <tony.luck@xxxxxxxxx>, <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-ia64-devel] vIOSAPIC and IRQs delivery
From: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Date: Mon, 13 Mar 2006 21:23:37 +0800
Delivery-date: Mon, 13 Mar 2006 13:24:58 +0000
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Thread-topic: [Xen-ia64-devel] vIOSAPIC and IRQs delivery
Tristan Gingold wrote:
>> To me, it's also likely to imagine a mixed style: multiple IOSAPICs
>> provided by the platform with total irq lines less than number of
>> interrupt sources. In that case, people may partition interrupt
>> domains, but finally still with irq line sharing even within local
>> domain if it's electronically wired together. :-)
> I really think this is pure theory.
> 
> IRQ lines were shared when hardware was costly: IBM-PC of 1981.
> It is also less performant (we have to check all drivers) and less
> sure: what about badly written drivers or fault tolerance?
> 

Do you mean you change mind in supporting shared IRQ? Previously you
agreed to support in Xen/IA64.

> Now IOSAPIC are cheap.  I don't know any ia64 vendor sharing IRQs on
> PCI bus. Maybe I am wrong, but until now it is true.
> 
> Furthermore, PCI-e has no more IRQ lines.  IRQ are now in-band
> messages (MSI). Thus sharing IRQs is not the future too.

Is not FUJITSU PRIMEQUEST an example as mentioned by Kenji Kaneshige? 

> 
> Tristan.
> 
Eddie

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