RE: [Xen-ia64-devel] vIOSAPIC and IRQs delivery

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

>From: Tristan Gingold [mailto:Tristan.Gingold@xxxxxxxx]
>Sent: 2006年3月13日 17:38
>> To me, it's also likely to imagine a mixed style: multiple IOSAPICs
>> provided by the platform with total irq lines less than number of
>interrupt
>> sources. In that case, people may partition interrupt domains, but
>finally
>> still with irq line sharing even within local domain if it's electronically
>> wired together. :-)

>I really think this is pure theory.

Please do right things right instead of putting uncertain stuff into "theory" 
category. 

>
>Now IOSAPIC are cheap.  I don't know any ia64 vendor sharing IRQs
>on PCI bus.
>Maybe I am wrong, but until now it is true.

"You don't know" doesn't mean "absence" or "even absence in the future".
Yes, I know few examples for models described on that ipf-interrupt 
manual. However to me, the simple thing is to ensure architecture 
correctness and completeness per architecture manual, instead of only 
accommodating partial knowledge at one time. 

>
>Furthermore, PCI-e has no more IRQ lines.  IRQ are now in-band
>messages (MSI).
>Thus sharing IRQs is not the future too.

Know little about PCI-e and can't say nothing. However I know one 
important feature of virtualization is to support legacy platform.

Thanks,
Kevin

_______________________________________________
Xen-ia64-devel mailing list
Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ia64-devel