[PATCH 07/17] hvmloader: add basic Q35 support

["Thierry Escande" <thierry.escande@xxxxxxxxxx>]

The current hvmloader implementation assumes a fixed PCI-to-ISA bridge
at 00:01.0 (PIIX3). This patch introduces support for the ICH9 LPC
bridge used in Q35 machine types, which resides at 00:1f.0.

It also initializes PIRQA...{PIRQD, PIRQH} routing accordingly to the
emulated south bridge (either located on PCI_ISA_DEVFN or
PCI_ICH9_LPC_DEVFN).

Signed-off-by: Alexey Gerasimenko <x1917x@xxxxxxxxx>
Signed-off-by: Thierry Escande <thierry.escande@xxxxxxxxxx>
---
 tools/firmware/hvmloader/config.h   |  1 +
 tools/firmware/hvmloader/pci.c      | 34 ++++++++++++++++++++++++-----
 tools/firmware/hvmloader/pci_regs.h |  1 +
 3 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/tools/firmware/hvmloader/config.h 
b/tools/firmware/hvmloader/config.h
index c159db30ee..baaed91c7f 100644
--- a/tools/firmware/hvmloader/config.h
+++ b/tools/firmware/hvmloader/config.h
@@ -54,6 +54,7 @@ extern uint32_t *cpu_to_apicid;
 
 #define PCI_ISA_DEVFN       0x08    /* dev 1, fn 0 */
 #define PCI_ISA_IRQ_MASK    0x0c20U /* ISA IRQs 5,10,11 are PCI connected */
+#define PCI_ICH9_LPC_DEVFN  0xf8    /* dev 31, fn 0 */
 
 #define ACPI_TIS_HDR_ADDRESS 0xFED40F00UL
 
diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
index a76d051bdf..91c7fd2171 100644
--- a/tools/firmware/hvmloader/pci.c
+++ b/tools/firmware/hvmloader/pci.c
@@ -84,6 +84,10 @@ static int find_next_rmrr(uint32_t base)
     return next_rmrr;
 }
 
+#define SCI_EN_IOPORT  (ACPI_PM1A_EVT_BLK_ADDRESS_V1 + 0x30)
+#define GBL_SMI_EN     (1 << 0)
+#define APMC_EN        (1 << 5)
+
 static void class_specific_pci_device_setup(uint16_t vendor_id,
                                             uint16_t device_id,
                                             uint16_t class,
@@ -140,6 +144,17 @@ static void class_specific_pci_device_setup(uint16_t 
vendor_id,
             pci_writew(devfn, 0x42, 0x8000); /* enable IDE1 */
         }
         break;
+    case PCI_CLASS_BRIDGE_ISA:
+        /* LPC bridge */
+        if ( vendor_id == 0x8086 && device_id == 0x2918 )
+        {
+            pci_writeb(devfn, 0x3c, 0x09); /* Hardcoded IRQ9 */
+            pci_writeb(devfn, 0x3d, 0x01);
+            pci_writel(devfn, 0x40, ACPI_PM1A_EVT_BLK_ADDRESS_V1 | 1);
+            pci_writeb(devfn, 0x44, 0x80); /* enable PM io space */
+            outl(SCI_EN_IOPORT, inl(SCI_EN_IOPORT) | GBL_SMI_EN | APMC_EN);
+        }
+        break;
     }
 }
 
@@ -152,6 +167,7 @@ void pci_setup(void)
     uint16_t class, vendor_id, device_id;
     unsigned int bar, pin, link, isa_irq;
     uint8_t pci_devfn_decode_type[256] = {};
+    int is_running_on_q35 = (machine_type == MACHINE_TYPE_Q35);
 
     /* Resources assignable to PCI devices via BARs. */
     struct resource {
@@ -209,7 +225,16 @@ void pci_setup(void)
     {
         do { isa_irq = (isa_irq + 1) & 15;
         } while ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) );
-        pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq);
+
+        if ( is_running_on_q35 )
+        {
+            pci_writeb(PCI_ICH9_LPC_DEVFN, 0x60 + link, isa_irq);
+        }
+        else
+        {
+            pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq);
+        }
+
         printf("PCI-ISA link %u routed to IRQ%u\n", link, isa_irq);
     }
 
@@ -226,9 +251,6 @@ void pci_setup(void)
         if ( (vendor_id == 0xffff) && (device_id == 0xffff) )
             continue;
 
-        ASSERT((devfn != PCI_ISA_DEVFN) ||
-               ((vendor_id == 0x8086) && (device_id == 0x7000)));
-
         class_specific_pci_device_setup(vendor_id, device_id, class,
                                         0 /* virt_bus support TBD */,
                                         devfn, &vga_devfn);
@@ -362,7 +384,9 @@ void pci_setup(void)
         {
             /* This is the barber's pole mapping used by Xen. */
             link = ((pin - 1) + (devfn >> 3)) & 3;
-            isa_irq = pci_readb(PCI_ISA_DEVFN, 0x60 + link);
+            isa_irq = pci_readb(is_running_on_q35 ?
+                                PCI_ICH9_LPC_DEVFN : PCI_ISA_DEVFN,
+                                0x60 + link);
             pci_writeb(devfn, PCI_INTERRUPT_LINE, isa_irq);
             printf("pci dev %02x:%x INT%c->IRQ%u\n",
                    devfn>>3, devfn&7, 'A'+pin-1, isa_irq);
diff --git a/tools/firmware/hvmloader/pci_regs.h 
b/tools/firmware/hvmloader/pci_regs.h
index c94278855b..d217b8f1a4 100644
--- a/tools/firmware/hvmloader/pci_regs.h
+++ b/tools/firmware/hvmloader/pci_regs.h
@@ -114,6 +114,7 @@
 #define PCI_CLASS_STORAGE_IDE            0x0101
 #define PCI_CLASS_DISPLAY_VGA            0x0300
 #define PCI_CLASS_BRIDGE_OTHER           0x0680
+#define PCI_CLASS_BRIDGE_ISA             0x0601
 
 #endif /* __HVMLOADER_PCI_REGS_H__ */
 
-- 
2.51.0



--
Thierry Escande | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech