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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH 10/16] x86/amd: Always probe and configure the masking MSRs
On 26.01.2026 18:53, Andrew Cooper wrote:
> This allows the infrastructure to reused for system-wide quirk/errata
> adjustments.
>
> Replace the call to ctxt_switch_levelling() with amd_ctxt_switch_masking()
> instead. The CPUID Faulting aspect is not interesting at this point in boot,
> and we want to explicitly propagate the masking MSR defaults into APs.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
with two comment nits:
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -162,7 +162,7 @@ static void __init noinline probe_masking_msrs(void)
> * parameter of NULL is used to context switch to the default host state (by
> * the cpu bringup-code, crash path, etc).
> */
> -static void cf_check amd_ctxt_switch_masking(const struct vcpu *next)
> +void cf_check amd_ctxt_switch_masking(const struct vcpu *next)
> {
> struct cpuidmasks *these_masks = &this_cpu(cpuidmasks);
> const struct domain *nextd = next ? next->domain : NULL;
> @@ -242,9 +242,12 @@ static void __init amd_init_levelling(void)
> boot_cpu_has(X86_FEATURE_CPUID_USER_DIS)) {
> expected_levelling_cap |= LCAP_faulting;
> levelling_caps |= LCAP_faulting;
> - return;
> }
>
> + /*
> + * Always probe for the MSRs too. We reuse the infrastruture for
> + * quirks/errata/etc during boot.
> + */
> probe_masking_msrs();
This isn't just about boot, but also soft-onlining of CPUs and S3 resume.
> @@ -1015,7 +1018,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
> u32 l, h;
> uint64_t value;
>
> - ctxt_switch_levelling(NULL);
> + /*
> + * Reuse amd_ctxt_switch_masking() explicitly. This propagates
> + * quirk/errata adjustments made duing early_init_amd() into the APs.
> + */
> + amd_ctxt_switch_masking(NULL);
Have the same comment also ...
> --- a/xen/arch/x86/cpu/hygon.c
> +++ b/xen/arch/x86/cpu/hygon.c
> @@ -32,7 +32,7 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
> {
> unsigned long long value;
>
> - ctxt_switch_levelling(NULL);
> + amd_ctxt_switch_masking(NULL);
... here?
Jan
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