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Re: [PATCH 10/16] x86/amd: Always probe and configure the masking MSRs


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Tue, 27 Jan 2026 16:28:08 +0100
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Julian Vetter <julian.vetter@xxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Tue, 27 Jan 2026 15:28:20 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 26.01.2026 18:53, Andrew Cooper wrote:
> This allows the infrastructure to reused for system-wide quirk/errata
> adjustments.
> 
> Replace the call to ctxt_switch_levelling() with amd_ctxt_switch_masking()
> instead.  The CPUID Faulting aspect is not interesting at this point in boot,
> and we want to explicitly propagate the masking MSR defaults into APs.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
with two comment nits:

> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -162,7 +162,7 @@ static void __init noinline probe_masking_msrs(void)
>   * parameter of NULL is used to context switch to the default host state (by
>   * the cpu bringup-code, crash path, etc).
>   */
> -static void cf_check amd_ctxt_switch_masking(const struct vcpu *next)
> +void cf_check amd_ctxt_switch_masking(const struct vcpu *next)
>  {
>       struct cpuidmasks *these_masks = &this_cpu(cpuidmasks);
>       const struct domain *nextd = next ? next->domain : NULL;
> @@ -242,9 +242,12 @@ static void __init amd_init_levelling(void)
>           boot_cpu_has(X86_FEATURE_CPUID_USER_DIS)) {
>               expected_levelling_cap |= LCAP_faulting;
>               levelling_caps |= LCAP_faulting;
> -             return;
>       }
>  
> +     /*
> +      * Always probe for the MSRs too.  We reuse the infrastruture for
> +      * quirks/errata/etc during boot.
> +      */
>       probe_masking_msrs();

This isn't just about boot, but also soft-onlining of CPUs and S3 resume.

> @@ -1015,7 +1018,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
>       u32 l, h;
>       uint64_t value;
>  
> -     ctxt_switch_levelling(NULL);
> +     /*
> +      * Reuse amd_ctxt_switch_masking() explicitly.  This propagates
> +      * quirk/errata adjustments made duing early_init_amd() into the APs.
> +      */
> +     amd_ctxt_switch_masking(NULL);

Have the same comment also ...

> --- a/xen/arch/x86/cpu/hygon.c
> +++ b/xen/arch/x86/cpu/hygon.c
> @@ -32,7 +32,7 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
>  {
>       unsigned long long value;
>  
> -     ctxt_switch_levelling(NULL);
> +     amd_ctxt_switch_masking(NULL);

... here?

Jan



 


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