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Re: [PATCH 09/16] x86/intel: Always check MSR_MISC_ENABLE on all CPUs
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Tue, 27 Jan 2026 14:45:59 +0000
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Julian Vetter <julian.vetter@xxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>
- Delivery-date: Tue, 27 Jan 2026 14:46:13 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 26/01/2026 5:53 pm, Andrew Cooper wrote:
> Currently, the BSP only leaves instructions for the APs to adjust
> MSR_MISC_ENABLE if the BSP is found to need adjustments. Particularly if
> XD_DISABLE is needed on an AP but not the BSP, the system will triple fault
> with no information provided to the user.
>
> Rework the BSP and trampoline logic to always read MISC_ENABLE, and clear
> CPUID_LIMIT and XD_DISABLE if either are set.
>
> Repurpose intel_unlock_cpuid_leaves() to be intel_check_misc_enable() and make
> it static in common.c. Replace trampoline_misc_enable_off with the smaller
> trampoline_check_misc_enable.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> ---
> CC: Jan Beulich <JBeulich@xxxxxxxx>
> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> CC: Julian Vetter <julian.vetter@xxxxxxxxxx>
> CC: Teddy Astie <teddy.astie@xxxxxxxxxx>
>
> This temporarily removes the printk() noting the reactivation of XD because
> the earlier BSP code has already done it, but that logic is about to be
> removed.
Actually, I'd forgotten that this is still reachable, via xen.efi, and
is the bug that kicked off all this work originally.
Julien has requested that I try to integrate the two series together,
which I'll do for v2.
~Andrew
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