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Re: [PATCH 3/3] x86/amd: Delay amd_init_levelling() until after fixes to the CPUID MSRs
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Wed, 21 Jan 2026 11:58:54 +0000
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Wed, 21 Jan 2026 11:59:10 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 08/12/2025 9:41 am, Jan Beulich wrote:
> On 02.12.2025 11:57, Andrew Cooper wrote:
>> There's no need for amd_init_levelling() to be specifically early. In fact,
>> it must be after init_amd() edits the feature MSRs, e.g. enabling TOPOEXT on
>> Fam15h, or we revert the change on the next context switch.
> However, ...
>
>> @@ -1270,10 +1262,14 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
>> check_syscfg_dram_mod_en();
>>
>> amd_log_freq(c);
>> +
>> + if (c == &boot_cpu_data)
>> + amd_init_levelling(); /* After CPUID MSR adjustments. */
>> +
>> + ctxt_switch_levelling(NULL);
>> }
> ... this new placement conflicts with the two RDSEED patches which have been
> pending for a while / too long. Even moving up wouldn't help, as the TOPOEXT
> re-enabling is after the switch() that the RDSEED changes are being fit into.
> Surely I could re-base accordingly, but it kind of feels that the older
> changes should go in first, with whatever adjustments necessary done either
> here, or (in a preparatory and agreed upon manner) right there, or entirely
> independently.
>
> Looks like it would be possible to move the TOPOEXT re-enabling ahead of that
> very switch(), for the code above then to be inserted between that and said
> switch().
The NX fixes also need to re-activate a CPUID bit, so I'm going to have
to rework this all differently anyway.
~Andrew
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