[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v1 07/14] xen/riscv: introduce exception handlers implementation
- To: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 23 Jan 2023 12:17:09 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KcZyObBD1Y4xR9d5H5jjaWL1DUlT7QjalG2VbjboC9Q=; b=ASknvcMPDlONBYu5Jy0PK2H98/A/GnynJIjl9Di8/CdqFmpGI+lcozhhGa9SxuHH6I2NCqZyCpCMS6KHMSrgA92rQU86xuIK+87kjN9nchDx2caOTcMbjRoLtwwzNVfdwMXOSRgbnomWuwmTMP1glafOozNTM+DYFl1RLjwf+nVvIYGva1yNUSzeuYXEQIc67O6pbw+wN/k+xP0mqT6Uf17iEbwm0Q1WNzItyn5bKHiZeoBLC3fWLXy8Zj387PuiX0vYEHgLonBD/d3Ha1ZZBm+nryv3iA5ZBz6P/EHT6EGHmeanshFaVQFFp6HtU8fhir7p9Jug4uIeKztseW9X9Q==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZemJkwHiQESsbiLLYgW1fuW4zO/tmTYt/VlJ6I9N5Nj7caPDHhe5xRJQf+VaM6171L59NXt6Y1zvtSAI8m+Rg/QQNswo5Z440rOiLhtVulPu2Fiy8vraiLqzitFpI0s5gbyhCxl+64U65bouo6ZaIvIvoVrvi0KLEd4GU5vJTqn0yRf4EuALSOh+6z1PgKzBHQ8LAdV8jFfYuznVrEnnM4y/Fj1NbZ9mntSUTCYEWfk9yXNnELHtoc558w4OnNMTaru3R4lBd48kGHOc7yLqnC9EiB3LhPXPXbwbUADG/BOKmOxaSFyrm24SiSmZDyUEziUABcmKf3uGgRjagbuzVA==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Gianluca Guida <gianluca@xxxxxxxxxxxx>, Bob Eshleman <bobbyeshleman@xxxxxxxxx>, Alistair Francis <alistair.francis@xxxxxxx>, Connor Davis <connojdavis@xxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Mon, 23 Jan 2023 11:17:26 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 20.01.2023 15:59, Oleksii Kurochko wrote:
> --- /dev/null
> +++ b/xen/arch/riscv/entry.S
> @@ -0,0 +1,97 @@
> +#include <asm/asm.h>
> +#include <asm/processor.h>
> +#include <asm/riscv_encoding.h>
> +#include <asm/traps.h>
> +
> + .global handle_exception
> + .align 4
> +
> +handle_exception:
> +
> + /* Exceptions from xen */
> +save_to_stack:
> + /* Save context to stack */
> + REG_S sp, (RISCV_CPU_USER_REGS_OFFSET(sp) -
> RISCV_CPU_USER_REGS_SIZE) (sp)
> + addi sp, sp, -RISCV_CPU_USER_REGS_SIZE
> + REG_S t0, RISCV_CPU_USER_REGS_OFFSET(t0)(sp)
> + j save_context
> +
> +save_context:
Just curious: Why not simply fall through here, i.e. why the J which really
is a NOP in this case?
Jan
|