[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 2/2] x86/cpuid: Detect null segment behaviour on Zen2 CPUs
- To: Jane Malalane <jane.malalane@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 8 Sep 2021 14:08:49 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=LsHY1ULNA9PA1Ool8eII2TD7Ugxn9D41f/uPUTi33jM=; b=PN6I8pMpZYuM7TTVEfrbTomjKU82d7f+3MxVB5y6yTyA0NJHNMcr4ASap5op0MW/d0YwZKUeGokwfB+lJekbbTv8L8ENbeQBVcgCQeMcQ/5RjpxEvO5gxHHEeyHxO9ItSsl1W5XsUm6lVzEDF2jOyibd5QhRaotsE4PuFrf4VpTaOh7ZskKBPRXR/NswEE9mt/isLd07ed1/BLj43knaxqMVwvhySMk/QXqmCSWHJ5TsHe00wuQMdbdkG3+4Ctlr/NPFXjind6k66T0J/4v1TtZSNqNLw1XdPaMU6qQJWwQucPZ+h0La9E/8+qMRlE/TXSTUgHci1vi0NcFSqPJMEQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nJihRneq+s3lDAE3y6DluchPZzJYlXMOZIrjvgorEk0u6zLxjS/CDatI+zgIMnfS9NGXIrwee6TD++eftth2SiHIOjxPKtqnHIzfji+zJl/humVISBWlo3bVwe1ZwWBXo1dsAO2Cgb1RoXcGp9+4Fj1Rl5c/UM/EMp8Fs/M4KiJ722RBjUq4aFSFU+wo40Gz7H03KGSYTySIydFF2SZnuNDi1mnUBo2TRYt2oROoXvXE1FFo/t2yLx7fSQLwWAeWjjLRh+PbIZ/UuaHZ5mAGJ3kjpKU+aymvMlqXIfXYPUTpxuAVihNyUr698jOlzCklXLu97Q6+vtfNhqSzu2KG/Q==
- Authentication-results: lists.xenproject.org; dkim=none (message not signed) header.d=none;lists.xenproject.org; dmarc=none action=none header.from=suse.com;
- Cc: Wei Liu <wl@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Pu Wen <puwen@xxxxxxxx>, Andy Lutomirski <luto@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Wed, 08 Sep 2021 12:09:02 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 08.09.2021 10:19, Jane Malalane wrote:
> Zen2 CPUs actually have this behaviour, but the CPUID bit couldn't be
> introduced into Zen2 due to a lack of leaves. So, it was added in a
> new leaf in Zen3. Nonetheless, hypervisors can synthesize the CPUID
> bit in software.
Considering the prior model checks, I understand this isn't all Zen2s?
No matter what the answer, I'd like to ask that the first sentence
start with either "All" or "Some" (or something along these lines).
Which is of course fine to insert while committing, so not need to
send a v3.
> So, Xen probes for NSCB (NullSelectorClearsBit) and
> synthesizes the bit, if the behaviour is present.
>
> Suggested-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Signed-off-by: Jane Malalane <jane.malalane@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
|
