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Re: [PATCH] x86/idle: prevent entering C3/C6 on some Intel CPUs due to errata

On 22/05/2020 09:09, Roger Pau Monne wrote:
> Apply a workaround for errata BA80, AAK120, AAM108, AAO67, BD59,
> AAY54: Rapid Core C3/C6 Transition May Cause Unpredictable System
> Behavior.
> Limit maximum C state to C2 when SMT is enabled on the affected CPUs.


> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

A fix for this is long overdue.




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