Re: [Xen-devel] [PATCH v4] x86/cpu: Add supports for zhaoxin x86 platform

[David Wang <DavidWang@xxxxxxxxxxx>]

> -----Original Message-----
> From: Jan Beulich <JBeulich@xxxxxxxx>
> Sent: Monday, May 7, 2018 4:24 PM
> To: David Wang <DavidWang@xxxxxxxxxxx>
> Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>; Fiona Li(BJ-RD)
> <FionaLi@xxxxxxxxxxx>
> Subject: Re: [PATCH v4] x86/cpu: Add supports for zhaoxin x86 platform
> 
> >>> On 07.05.18 at 03:37, <Davidwang@xxxxxxxxxxx> wrote:
> > --- a/xen/arch/x86/cpu/intel_cacheinfo.c
> > +++ b/xen/arch/x86/cpu/intel_cacheinfo.c
> > @@ -176,7 +176,9 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86
> *c)
> >      * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
> >      * trace cache
> >      */
> > -   if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
> > +   if ( (num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1
> &&
> > +           c->x86_vendor != X86_VENDOR_SHANGHAI )
> 
> The indentation here is _still_ wrong (and there are stray spaces), but I'll 
> try
> to remember fixing this up when committing (after 4.11 was branched off),
> i.e. with that fixed
To be consistent with context, I indent with two Tabs.  Do I need to submit 
next version patch to revise it ?  Use 4 spaces instead of TAB?
Thank you for your patience.

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