Re: [Xen-devel] [PATCH 4/7] xen/arm32: Add skeleton to harden branch predictor aliasing attacks

[Julien Grall <julien.grall@xxxxxxxxxx>]

On 26/01/18 16:21, Julien Grall wrote:
> > "Therefore hypervisor code running with guest vectors table should be
> > minimized and always have interrupts and async aborts masked to reduce
> > the risk to use them."
> >
> > Do you think that it is clearer?
> Well, that was covered by "interrupts". If you look at the Arm Arm, A, 
> I, F are considered all interrupts.
I reworked the paragraph and it is now:

"However, on arm32, each vector contain a single instruction. This means 
that the hardened vector tables may rely on the state of registers that 
does not hold when in the hypervisor (e.g SP is 8 bytes aligned). 
Therefore hypervisor code running with guest vectors table should be
minimized and always have IRQ and SError masked to reduce the risk to 
use them."
Cheers,


--
Julien Grall

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