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[Xen-devel] [PATCH] x86: avoid insn patching on fully async entry paths



As long as our patching logic isn't safe against concurrently occurring
NMI or #MC we should avoid patching those paths. For sanity's sake also
avoid this on the #DF entry path.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/arch/x86/x86_64/entry.S
+++ b/xen/arch/x86/x86_64/entry.S
@@ -698,7 +698,7 @@ ENTRY(alignment_check)
 ENTRY(double_fault)
         movl  $TRAP_double_fault,4(%rsp)
         /* Set AC to reduce chance of further SMAP faults */
-        SAVE_ALL STAC
+        SAVE_ALL STAC_SAFE
 
         GET_STACK_END(bx)
         mov   STACK_CPUINFO_FIELD(xen_cr3)(%rbx), %rbx
@@ -727,7 +727,7 @@ ENTRY(nmi)
         pushq $0
         movl  $TRAP_nmi,4(%rsp)
 handle_ist_exception:
-        SAVE_ALL CLAC
+        SAVE_ALL CLAC_SAFE
 
         GET_STACK_END(14)
         mov   STACK_CPUINFO_FIELD(xen_cr3)(%r14), %rcx
--- a/xen/include/asm-x86/asm_defns.h
+++ b/xen/include/asm-x86/asm_defns.h
@@ -203,8 +203,22 @@ void ret_from_intr(void);
         altinstruction_entry 661b, 662b, X86_FEATURE_XEN_SMAP, 3, 3;       \
         .popsection
 
-#define ASM_STAC ASM_AC(STAC)
-#define ASM_CLAC ASM_AC(CLAC)
+.macro ASM_STAC
+        ASM_AC(STAC)
+.endm
+.macro ASM_CLAC
+        ASM_AC(CLAC)
+.endm
+.macro ASM_STAC_SAFE
+        pushf
+        orl   $X86_EFLAGS_AC, (%rsp)
+        popf
+.endm
+.macro ASM_CLAC_SAFE
+        pushf
+        andl  $~X86_EFLAGS_AC, (%rsp)
+        popf
+.endm
 
 .macro write_cr3 val:req, tmp1:req, tmp2:req
         mov   %cr4, %\tmp1
@@ -241,16 +255,8 @@ static always_inline void stac(void)
 
 #ifdef __ASSEMBLY__
 .macro SAVE_ALL op, compat=0
-.ifeqs "\op", "CLAC"
-        ASM_CLAC
-.else
-.ifeqs "\op", "STAC"
-        ASM_STAC
-.else
 .ifnb \op
-        .err
-.endif
-.endif
+        ASM_\op
 .endif
         addq  $-(UREGS_error_code-UREGS_r15), %rsp
         cld




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