Re: [Xen-devel] [PATCH] X86/VPMU: mask off uncore overflow bit on xeon phi knights landing

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 12.12.16 at 09:06, <luwei.kang@xxxxxxxxx> wrote:
>> >>> On 12.12.16 at 07:51, <luwei.kang@xxxxxxxxx> wrote:
>> > By the way, I think another place may need to do some modify as well.
>> >
>> > @@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct 
>> > cpu_user_regs *regs)
>> >          if ( is_pmc_quirk )
>> >              handle_pmc_quirk(msr_content);
>> >          core2_vpmu_cxt->global_status |= msr_content;
>> > -        msr_content = ~global_ovf_ctrl_mask;
>> > +        msr_content &= ~global_ovf_ctrl_mask;
>> >          wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content);
>> >      }
>> >
>> > If one counter have overflow all the bit will be clean. I think it
>> > need add & with current status.
>> >
>> > Hi jan and Andrew,
>> >     What is your opinion?
>> 
>> I agree, but it looks to be an independent change.
>> 
>     Thanks for your reply. I will submit another patch regarding " 
> msr_content &= ~global_ovf_ctrl_mask;" soon.
>     What is your opinion about this patch? Need any modify?

"This" being which one? The one visible above, or the one at the
root of this thread? For the one above I've already said "I agree",
so I'm not sure what else you ask for. For the one at the root of
this thread, I think Boris has pointed out what changes would be
wanted.

Jan


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