[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 1/2] AMD/VPMU: 0xc0010000 - 0xc001007 MSRs are in PMU range
>>> On 08.08.16 at 17:05, <boris.ostrovsky@xxxxxxxxxx> wrote: > On 08/08/2016 10:09 AM, Jan Beulich wrote: >>> The reserved bits look the same on all supported families --- bits >>> 63:42, 39:36, 21 and 19. Except apparently on family 12h bit 19 is MBZ. >> Isn't MBZ == reserved for all practical purposes? > > My understanding is that when something is MBZ we know we shouldn't > write 1 there. Reserved can be either 1 or 0 --- that's what my system > may have with bit 19 set. (Although it's also possible that POST or BIOS > are sloppy). All understood, yet for us it still means: Don't touch those bits. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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