[Xen-devel] [PATCH 2/2] AMD/VPMU: Keep reserved MSR bits untouched but allow the rest to be written

[Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>]

While AMD APM suggests that reserved MSR bits are not supposed to be
touched, it is not clear how (or whether) HW enforces this for PMU
registers. At least on some family 10h processors writes of these bits
are apparently ignored: guests (such as Linux) assume that the bits
are zero and write the MSRs with that assumption in mind even though
the bits are set by the time OS/hypervisor starts runnning.

With that in mind, let's stop reporting an error to the guest if it
tries to modify those bits and instead adjust the value to be written
safely.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
---
 xen/arch/x86/cpu/vpmu_amd.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c
index 55d03b3..6147ec4 100644
--- a/xen/arch/x86/cpu/vpmu_amd.c
+++ b/xen/arch/x86/cpu/vpmu_amd.c
@@ -247,15 +247,7 @@ static int amd_vpmu_load(struct vcpu *v, bool_t from_guest)
 
         for ( i = 0; i < num_counters; i++ )
         {
-            if ( (ctrl_regs[i] & CTRL_RSVD_MASK) != ctrl_rsvd[i] )
-            {
-                /*
-                 * Not necessary to re-init context since we should never load
-                 * it until guest provides valid values. But just to be safe.
-                 */
-                amd_vpmu_init_regs(ctxt);
-                return -EINVAL;
-            }
+            ctrl_regs[i] = (ctrl_regs[i] & ~CTRL_RSVD_MASK) | ctrl_rsvd[i];
 
             if ( is_pmu_enabled(ctrl_regs[i]) )
                 is_running = 1;
@@ -363,9 +355,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t 
msr_content,
 
     ASSERT(!supported);
 
-    if ( (type == MSR_TYPE_CTRL ) &&
-         ((msr_content & CTRL_RSVD_MASK) != ctrl_rsvd[idx]) )
-        return -EINVAL;
+    /* Make sure reserved bits are not touched */
+    if ( type == MSR_TYPE_CTRL )
+        msr_content = (msr_content & ~CTRL_RSVD_MASK) | ctrl_rsvd[idx];
 
     /* For all counters, enable guest only mode for HVM guest */
     if ( has_hvm_container_vcpu(v) && (type == MSR_TYPE_CTRL) &&
-- 
1.8.3.1


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