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Re: [Xen-devel] [PATCH 4/4] xenctx: Support arm64 and actually implement output for 32 and 64 bit

On Fri, 2013-04-12 at 15:25 +0100, Ian Campbell wrote:
> On Fri, 2013-04-12 at 14:13 +0100, Ian Campbell wrote:
> (there's actually an issue with this change, but I'm going to comment on
> that separately since it is thorny)
> @@ -218,7 +218,7 @@ typedef uint64_t xen_callback_t;
>  #define PSR_MODE_SYS 0x1f
>  /* 64 bit modes */
> -#ifdef CONFIG_ARM_64
> +#ifdef __aarch64__
>  #define PSR_MODE_BIT  0x10 /* Set iff AArch32 */
>  #define PSR_MODE_EL3h 0x0d
>  #define PSR_MODE_EL3t 0x0c

There is an issue here which is:

tools/include/xen/arch-arm.h:229:0: error: "PSR_MODE_EL0t" redefined [-Werror]
In file included from 
                 from xentrace.c:21:
 note: this is the location of the previous definition

This is because Linux's asm/ptrace.h (which is in the include chain from
<signal.h>) defines a bunch of extra symbols. I "solved" it with the
hack below, but really I think this is a bug in either Linux on arm64,
or perhaps glibc for propagating it. I'll bring it up with the kernel
guys but I wonder if we ought to take the patch as a skanky workaround
for now...



>From 8d67164fce5e21e2b6353b02834aa40c81bb714a Mon Sep 17 00:00:00 2001
From: Ian Campbell <ian.campbell@xxxxxxxxxx>
Date: Fri, 12 Apr 2013 15:33:55 +0100
Subject: [PATCH] arm: Undefine PSR_MODE_* in public arch-arm.h

These clash with symbols in Linux asm/ptrace.h. This is probably a bug in
Linux (or perhaps glibc) but we work around it here.

Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
 xen/include/public/arch-arm.h |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h
index 2f5ce18..d1753d8 100644
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -219,6 +219,16 @@ typedef uint64_t xen_callback_t;
 /* 64 bit modes */
 #ifdef __aarch64__
+#undef PSR_MODE_BIT
+#undef PSR_MODE_EL3h
+#undef PSR_MODE_EL3t
+#undef PSR_MODE_EL2h
+#undef PSR_MODE_EL2t
+#undef PSR_MODE_EL1h
+#undef PSR_MODE_EL1t
+#undef PSR_MODE_EL0t
 #define PSR_MODE_BIT  0x10 /* Set iff AArch32 */
 #define PSR_MODE_EL3h 0x0d
 #define PSR_MODE_EL3t 0x0c

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