Re: [Xen-devel] [PATCH v3 11/11] nested vmx: check host ability when intercept MSR read

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 06.12.12 at 02:09, Dongxiao Xu <dongxiao.xu@xxxxxxxxx> wrote:
> When guest hypervisor tries to read MSR value, we intercept this behavior
> and return certain emulated values. Besides that, we also need to ensure
> that those emulated values must compatible with host ability.
> 
> Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx>
> ---
>  xen/arch/x86/hvm/vmx/vvmx.c |   18 ++++++++++++++----
>  1 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index 178adbc..e65f963 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -1319,19 +1319,20 @@ int nvmx_handle_vmwrite(struct cpu_user_regs *regs)
>   */
>  int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
>  {
> -    u64 data = 0, tmp = 0;
> +    u64 data = 0, host_data = 0, tmp = 0;
>      int r = 1;
>  
>      if ( !nestedhvm_enabled(current->domain) )
>          return 0;
>  
> +    rdmsrl(msr, host_data);
> +
>      /*
>       * Remove unsupport features from n1 guest capability MSR
>       */
>      switch (msr) {
>      case MSR_IA32_VMX_BASIC:
> -        data = VVMCS_REVISION | ((u64)PAGE_SIZE) << 32 | 
> -               ((u64)MTRR_TYPE_WRBACK) << 50 | VMX_BASIC_DEFAULT1_ZERO;
> +        data = (host_data & (~0ul << 32)) | VVMCS_REVISION;
>          break;
>      case MSR_IA32_VMX_PINBASED_CTLS:
>      case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
> @@ -1341,6 +1342,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>                 PIN_BASED_PREEMPT_TIMER;
>          tmp = VMX_PINBASED_CTLS_DEFAULT1;
>          data = ((data | tmp) << 32) | (tmp);
> +        data = ((data & host_data) & (~0ul << 32)) |
> +               ((data | host_data) & (~0u));

Can this be macroized, please? And personally I'd prefer the
second part to be done via a cast to uint32_t rather than
and-ing with ~0u.

Jan

>          break;
>      case MSR_IA32_VMX_PROCBASED_CTLS:
>      case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
> @@ -1368,6 +1371,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>          tmp = VMX_PROCBASED_CTLS_DEFAULT1;
>          /* 0-settings */
>          data = ((data | tmp) << 32) | (tmp);
> +        data = ((data & host_data) & (~0ul << 32)) |
> +               ((data | host_data) & (~0u));
>          break;
>      case MSR_IA32_VMX_PROCBASED_CTLS2:
>          /* 1-seetings */
> @@ -1376,6 +1381,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>          /* 0-settings */
>          tmp = 0;
>          data = (data << 32) | tmp;
> +        data = ((data & host_data) & (~0ul << 32)) |
> +               ((data | host_data) & (~0u));
>          break;
>      case MSR_IA32_VMX_EXIT_CTLS:
>      case MSR_IA32_VMX_TRUE_EXIT_CTLS:
> @@ -1391,6 +1398,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>                 VM_EXIT_LOAD_PERF_GLOBAL_CTRL;
>       /* 0-settings */
>          data = ((data | tmp) << 32) | tmp;
> +        data = ((data & host_data) & (~0ul << 32)) |
> +               ((data | host_data) & (~0u));
>          break;
>      case MSR_IA32_VMX_ENTRY_CTLS:
>      case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
> @@ -1401,8 +1410,9 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>                 VM_ENTRY_LOAD_PERF_GLOBAL_CTRL |
>                 VM_ENTRY_IA32E_MODE;
>          data = ((data | tmp) << 32) | tmp;
> +        data = ((data & host_data) & (~0ul << 32)) |
> +               ((data | host_data) & (~0u));
>          break;
> -
>      case IA32_FEATURE_CONTROL_MSR:
>          data = IA32_FEATURE_CONTROL_MSR_LOCK | 
>                 IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON_OUTSIDE_SMX;
> -- 
> 1.7.1
> 
> 
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> http://lists.xen.org/xen-devel 




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