[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] Re: [PATCH 4 of 5] Nested p2m: flush only one p2m table when reallocating
At 15:44 +0200 on 27 Jun (1309189494), Christoph Egger wrote: > > I think, this patch can be folded into the first one. I don't see which patch it would be folded into. It's a distinct change from the change to the flush implementation. > Otherwise: > > Ack-by: Christoph Egger <Christoph.Egger@xxxxxxx> Thank you. I'll apply them all this afternoon. Tim. > On 06/27/11 12:46, Tim Deegan wrote: > ># HG changeset patch > ># User Tim Deegan<Tim.Deegan@xxxxxxxxxx> > ># Date 1308929084 -3600 > ># Node ID 0753351afbbe1c3fdde3a72dfb5a67105524f813 > ># Parent 97e15368260c093078e1f1bc04521de30c1792cc > >Nested p2m: flush only one p2m table when reallocating. > >It's unhelpful to flush all of them when we only need one. > > > >Reported-by: Christoph Egger<Christoph.Egger@xxxxxxx> > >Signed-off-by: Tim Deegan<Tim.Deegan@xxxxxxxxxx> > > > >diff -r 97e15368260c -r 0753351afbbe xen/arch/x86/mm/p2m.c > >--- a/xen/arch/x86/mm/p2m.c Fri Jun 24 16:24:44 2011 +0100 > >+++ b/xen/arch/x86/mm/p2m.c Fri Jun 24 16:24:44 2011 +0100 > >@@ -1120,7 +1120,6 @@ p2m_get_nestedp2m(struct vcpu *v, uint64 > > volatile struct nestedvcpu *nv =&vcpu_nestedhvm(v); > > struct domain *d; > > struct p2m_domain *p2m; > >- int i; > > > > /* Mask out low bits; this avoids collisions with CR3_EADDR */ > > cr3&= ~(0xfffull); > >@@ -1146,12 +1145,9 @@ p2m_get_nestedp2m(struct vcpu *v, uint64 > > } > > > > /* All p2m's are or were in use. Take the least recent used one, > >- * flush it and reuse. > >- */ > >- for (i = 0; i< MAX_NESTEDP2M; i++) { > >- p2m = p2m_getlru_nestedp2m(d, NULL); > >- p2m_flush_locked(p2m); > >- } > >+ * flush it and reuse. */ > >+ p2m = p2m_getlru_nestedp2m(d, NULL); > >+ p2m_flush_locked(p2m); > > nv->nv_p2m = p2m; > > p2m->cr3 = cr3; > > nv->nv_flushp2m = 0; > > > > > -- > ---to satisfy European Law for business letters: > Advanced Micro Devices GmbH > Einsteinring 24, 85689 Dornach b. Muenchen > Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd > Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen > Registergericht Muenchen, HRB Nr. 43632 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxxxxxxxx > http://lists.xensource.com/xen-devel -- Tim Deegan <Tim.Deegan@xxxxxxxxxx> Principal Software Engineer, Xen Platform Team Citrix Systems UK Ltd. (Company #02937203, SL9 0BG) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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