Re: [Xen-devel] [help] rsp in case of interrupt/exception in ring0

[Mukesh Rathor <mukesh.rathor@xxxxxxxxxx>]

On Wed, 24 Feb 2010 08:35:31 +0000
"Jan Beulich" <JBeulich@xxxxxxxxxx> wrote:

> >>> Mukesh Rathor <mukesh.rathor@xxxxxxxxxx> 24.02.10 04:39 >>>
> >When a cpu is in hyp code and int/exception comes in, how/where is
> >rsp saved? According to intel manual if there's no ring transition,
> >then the cpu doesn't save ss/rsp. 
> 
> As you're apparently talking about x86-64, you probably simply read
> the wrong (32-bit) part of the manual. On 64-bits, ss:rsp are always
> getting saved, no matter whether there's a ring transition.
> 

You are right, few pages later, it talks about 64. Usually, they'll say
something about things being different on 64bit. Anyways. I'll email intel
docs to fix it...

thanks,
Mukesh



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