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[Xen-devel] [help] rsp in case of interrupt/exception in ring0



Hi,

can someone help me understand this.

When a cpu is in hyp code and int/exception comes in, how/where is rsp 
saved? According to intel manual if there's no ring transition, then
the cpu doesn't save ss/rsp. 

Following trail from entry.S to show_registers(), I don't see where
regs->rsp is loaded, yet show_registers() displays it happily.
show_stack() uses it. 

This also means that regs->rsp is actually going
to prev frame where orig hyp function was executing.

thanks,
Mukesh

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