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RE: [Xen-devel] IRQ SMP affinity problems in domU with vcpus > 4 on HP ProLiant G6 with dual Xeon 5540 (Nehalem)

Jan Beulich wrote:
>>>> "Zhang, Xiantao" <xiantao.zhang@xxxxxxxxx> 20.10.09 09:51 >>>
>> Attached two patches should fix the issues. For the issue which
>> complains "(XEN) do_IRQ: 1.187 No irq handler for vector (irq -1),",
>> I root-caused it. Currenlty, when programs MSI address & data, Xen
>> doesn't perform the mask/unmask logic to avoid inconsistent
>> interrupt genernation. In this case, according to spec, the
>> interrupt generation behavior is undfined, 
>> and device may generate MSI interrupts with the expected vector and
>> incorrect destination ID, so leads to the issue.  The attached two
>> patches should address it.
> What about the case of MSI not having a mask bit? Shouldn't movement
> (i.e. vector or affinity changes) be disallowed for non-maskable ones?

IRQ migration shouldn't depend on the interrupt status(mask/unmask), and 
hyperviosr can handle non-masked irq during the migration. 
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