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RE: [Xen-devel] Custom Hardware Acceleration

  • To: "Jad Naous" <jnaous@xxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
  • From: "Ian Pratt" <m+Ian.Pratt@xxxxxxxxxxxx>
  • Date: Thu, 26 Jan 2006 23:02:01 -0000
  • Delivery-date: Thu, 26 Jan 2006 23:10:57 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>
  • Thread-index: AcYifEsyyG7PXtLlSN6BxFLDZc4q9wAT+p9g
  • Thread-topic: [Xen-devel] Custom Hardware Acceleration

> Hi all,
> I am exploring the possibility of designing a custom hardware 
> acceleration solution using an ASIC or an FPGA to accelerate 
> some part of Xen. Basically, I am looking for some part of 
> the code that could be built in hardware to make it faster. 
> Does anybody know where I could get some statistics on the 
> code, such as the most called functions, the most 
> parallelizable functions, etc... If you could think of 
> something that would be useful in HW I would be very 
> interested to know.

You might like to take a look at the following paper, which Keir and I
wrote in 2000. Although we designed it for a different purpose, it would
work great with Xen and enable direct IO from guests with very low
additional hardware cost.



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