[XenPPC] [xenppc-unstable] [XEN][POWERPC] Add Function to completely flush the I-Cache for a processor

[Xen patchbot-xenppc-unstable <patchbot-xenppc-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
# Node ID 02f6e775deb1f6aa21154ee43712351a389681af
# Parent  85c482f30a0ab7e9d8730331e77c9e202d8ea6b1
[XEN][POWERPC] Add Function to completely flush the I-Cache for a processor

Signed-off-by: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
---
 xen/arch/powerpc/powerpc64/ppc970.c |   27 +++++++++++++++++++++++++++
 xen/include/asm-powerpc/cache.h     |    1 +
 2 files changed, 28 insertions(+)

diff -r 85c482f30a0a -r 02f6e775deb1 xen/arch/powerpc/powerpc64/ppc970.c
--- a/xen/arch/powerpc/powerpc64/ppc970.c       Mon Oct 02 11:06:10 2006 -0400
+++ b/xen/arch/powerpc/powerpc64/ppc970.c       Mon Oct 02 11:07:54 2006 -0400
@@ -39,10 +39,37 @@ struct cpu_caches cpu_caches = {
     .dline_size = 0x80,
     .log_dline_size = 7,
     .dlines_per_page = PAGE_SIZE >> 7,
+    .isize = (64 << 10),        /* 64 KiB */
     .iline_size = 0x80,
     .log_iline_size = 7,
     .ilines_per_page = PAGE_SIZE >> 7,
 };
+
+
+void cpu_flush_icache(void)
+{
+    union hid1 hid1;
+    ulong flags;
+    ulong ra;
+
+    local_irq_save(flags);
+
+    /* uses special processor mode that forces a real address match */
+    hid1.word = mfhid1();
+    hid1.bits.en_icbi = 1;
+    mthid1(hid1.word);
+
+    for (ra = 0; ra < cpu_caches.isize; ra += cpu_caches.iline_size)
+        icbi(ra);
+
+    sync();
+
+    hid1.bits.en_icbi = 0;
+    mthid1(hid1.word);
+
+    local_irq_save(flags);
+}
+
 
 struct rma_settings {
     int log;
diff -r 85c482f30a0a -r 02f6e775deb1 xen/include/asm-powerpc/cache.h
--- a/xen/include/asm-powerpc/cache.h   Mon Oct 02 11:06:10 2006 -0400
+++ b/xen/include/asm-powerpc/cache.h   Mon Oct 02 11:07:54 2006 -0400
@@ -70,4 +70,5 @@ struct cpu_caches {
     u32 ilines_per_page;
 };
 extern struct cpu_caches cpu_caches;
+extern void cpu_flush_icache(void);
 #endif

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