WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-ppc-devel

Re: Hang on boot Was: [XenPPC] [xenppc-unstable] [POWERPC][XEN] Detect b

To: Jimi Xenidis <jimix@xxxxxxxxxxxxxx>
Subject: Re: Hang on boot Was: [XenPPC] [xenppc-unstable] [POWERPC][XEN] Detect bad spurious interrupt condition and panic instead of hang
From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
Date: Tue, 12 Sep 2006 18:00:17 +0200
Cc: xen-ppc-devel@xxxxxxxxxxxxxxxxxxx
Delivery-date: Tue, 12 Sep 2006 09:01:13 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxx
In-reply-to: <ED08291D-885D-4945-AEA6-D79B45E45678@xxxxxxxxxxxxxx>
List-help: <mailto:xen-ppc-devel-request@lists.xensource.com?subject=help>
List-id: Xen PPC development <xen-ppc-devel.lists.xensource.com>
List-post: <mailto:xen-ppc-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-ppc-devel>, <mailto:xen-ppc-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-ppc-devel>, <mailto:xen-ppc-devel-request@lists.xensource.com?subject=unsubscribe>
References: <E1GN5qa-0000vF-8u@xxxxxxxxxxxxxxxxxxxxx> <ED08291D-885D-4945-AEA6-D79B45E45678@xxxxxxxxxxxxxx>
Sender: xen-ppc-devel-bounces@xxxxxxxxxxxxxxxxxxx
Sometimes when Xen is booted and we let Linux init the MPIC for "the second time" Xen could end up in a loop where the CPU is constantly being interrupted by the MPIC.

Because of console buffering, the last message you see is some message from early kernel boot.
Anyway.. we detect this now and you see a panic.

There seems to be a problem with the U3/U4 MPIC, where edge-
triggered interrupts are delivered to more than one CPU.  Every
CPU other than the one that ACKed it first, will get the spurious
vector (so functionally, the impact of this bug isn't that bad;
performance-wise it might be different).

The UART IRQ [on JS2x and Maple] is an edge IRQ; if you produce
console output for every spurious interrupt, you'll get a nice
little storm.  Is that what's happening?

Yes, I believe, it has something to do with temperature.

Interesting observation, never thought of investigating that --
it's in line with my suspicion that something in the MPIC is
metastable though.


Segher


_______________________________________________
Xen-ppc-devel mailing list
Xen-ppc-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ppc-devel