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[Xen-ia64-devel] RE: a potential issue in set/get-rse-reg function

To: "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>
Subject: [Xen-ia64-devel] RE: a potential issue in set/get-rse-reg function
From: "Xu, Anthony" <anthony.xu@xxxxxxxxx>
Date: Wed, 14 Sep 2005 10:02:13 +0800
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Thread-topic: a potential issue in set/get-rse-reg function
>What do you mean by "hypervisor can't inject tlb miss to
>guest kernel?"  Is it because virtual psr.ic is off?  If so,
>an OS should not be storing to location that might cause
>a miss when psr.ic is off unless the location is pinned
>by a TR.  Or is this a Linux bug too?  (I'm not looking
>at the code right now... is the guest backing store
>on the guest kernel stack (which is pinned by a virtual TR)
>or the guest's user stack?)

Sorry for not making it clear, because this tlb miss happens inside
hypervisor, it is hard to deliver tlb miss to guest, as least I don't
see the logic about this, how can you cope with hypervisor current
state? Do you want to "rfi" from guest OS handler to inside hypervisor
after handling tlb miss?

>I don't think we should be fixing theoretical architecture
>bugs that don't occur on any released implementation, nor on
>the next implementation that isn't even shipping yet (e.g. eager
>mode).  I'd suggest adding a comment, or perhaps a check
>and warning/error after the pal rse_info call that says
>eager mode has not been tested.  Changing such a fundamental
>and frequently executed part of the code may introduce
>other latent difficult bugs, and we already have plenty of bugs
>to track down that will break real users today.

>But that's just my opinion ;-)

I don't think so, as we known, linux kernel/ia64 supports rse eager mode
from very beginning though it is not implemented. Why don't xen/ia64
support rse eager mode?

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