RE: [Xen-ia64-devel] RE: [PATCH] Patch to make latest hg multi-domainback to work

["Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>]

> Since vcpu_itc_no_srlz is always invoked after 
> translate_domain_pte which will force _PAGE_PL_2 on, it seems 
> unlikely to insert a machine TC entry with incorrect 
> privilege level. After some search for reference to 
> dtlb/dtlb_pte, I found hyper_ptc_ga though not the full 
> reason, but possible a problematic point? In that section of 
> code, only vcpu->arch.dtlb/itlb is marked as non-present by:
> 
> adds r25=IA64_VCPU_DTLB_OFFSET,r27
> adds r26=IA64_VCPU_ITLB_OFFSET,r27;;
> ...
> st8 [r25]=r24                 // set 1-entry i/dtlb as not present
> 
> Instead vcpu->arch.dtlb_pte is not touched. So after my patch 
> changed match_dtlb to return guest pte, above problematic 
> code may leave them out of sync there. Comments?

I agree this is a bug, but I'm not sure it explains
the problem.  I will turn off HYPER_PTC_GA and see
if the problem goes away.

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