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RE: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid bi

To: 'Keir Fraser' <keir.fraser@xxxxxxxxxxxxx>, "Wei, Gang" <gang.wei@xxxxxxxxx>
Subject: RE: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus
From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Date: Fri, 5 Dec 2008 19:53:00 +0800
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Thread-topic: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus
>From: Keir Fraser
>Sent: Friday, December 05, 2008 7:48 PM
>
>It looks about right to me, and better than using cpu_khz as 
>in the current
>code and the original patch. How much skew does it introduce? 
>Is the skew a
>problem? Bearing in mind that from the point of view of HVM guests, TSC
>rates will be all over the place anyway if we are using P 
>states (and the
>host TSC is not invariant, which is actually the only time your code is
>enabled anyway).
>

'invariant' here means a new feature that tsc is always running
even when clock is stopped at deep C-state entrance. For example,
latest Intel Core i7 has that feature supported. For P-state, it's 
another term called "constant tsc" being used which has nothing
to do with C-state. Also as I wrote earlier, constant tsc is supported
in many processors nowadays.

Thanks,
Kevin
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