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[Xen-changelog] Fix and turn back on unat checking in fast paths

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] Fix and turn back on unat checking in fast paths
From: Xen patchbot -unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Wed, 03 Aug 2005 05:26:13 -0400
Delivery-date: Wed, 03 Aug 2005 09:27:07 +0000
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# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID 0cc05e9a34823eac5403778acb89066e2750219a
# Parent  6e9248e8f40177bfc7bf3456658daa49ab5170a2
Fix and turn back on unat checking in fast paths

diff -r 6e9248e8f401 -r 0cc05e9a3482 xen/arch/ia64/hyperprivop.S
--- a/xen/arch/ia64/hyperprivop.S       Mon Jul 18 21:05:04 2005
+++ b/xen/arch/ia64/hyperprivop.S       Tue Jul 19 00:44:14 2005
@@ -28,7 +28,7 @@
 #endif
 
 // FIXME: turn off for now... fix zero'ing regs, should be bank1?
-//#define HANDLE_AR_UNAT
+#define HANDLE_AR_UNAT
 
 // FIXME: This is defined in include/asm-ia64/hw_irq.h but this
 // doesn't appear to be include'able from assembly?
@@ -457,14 +457,16 @@
        .mem.offset 8,0; st8.spill [r3]=r29,16 ;;
        .mem.offset 0,0; st8.spill [r2]=r30,16;
        .mem.offset 8,0; st8.spill [r3]=r31,16 ;;
-       movl r31=XSI_IPSR;;
+#ifdef HANDLE_AR_UNAT
+       // bank0 regs have no NaT bit, so ensure they are NaT clean
+       mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
+       mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
+       mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
+       mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
+#endif
        bsw.0 ;;
        mov r2=r30; mov r3=r29;;
 #ifdef HANDLE_AR_UNAT
-       // bank0 regs have no NaT bit, so ensure they are NaT clean
-       mov r16=r0; mov r17=r0; mov r19=r0;
-       mov r21=r0; mov r22=r0; mov r23=r0;
-       mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
        mov ar.unat=r28;
 #endif
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
@@ -608,14 +610,17 @@
        .mem.offset 8,0; st8.spill [r3]=r29,16 ;;
        .mem.offset 0,0; st8.spill [r2]=r30,16;
        .mem.offset 8,0; st8.spill [r3]=r31,16 ;;
+#ifdef HANDLE_AR_UNAT
+       // bank0 regs have no NaT bit, so ensure they are NaT clean
+       mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
+       mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
+       mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
+       mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
+#endif
        movl r31=XSI_IPSR;;
        bsw.0 ;;
        mov r2=r30; mov r3=r29;;
 #ifdef HANDLE_AR_UNAT
-       // bank0 regs have no NaT bit, so ensure they are NaT clean
-       mov r16=r0; mov r17=r0; mov r19=r0;
-       mov r21=r0; mov r22=r0; mov r23=r0;
-       mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
        mov ar.unat=r28;
 #endif
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
diff -r 6e9248e8f401 -r 0cc05e9a3482 xen/include/asm-ia64/xensystem.h
--- a/xen/include/asm-ia64/xensystem.h  Mon Jul 18 21:05:04 2005
+++ b/xen/include/asm-ia64/xensystem.h  Tue Jul 19 00:44:14 2005
@@ -59,8 +59,8 @@
        if (IA64_HAS_EXTRA_STATE(next))                                         
                 \
                ia64_load_extra(next);                                          
                 \
        /*ia64_psr(ia64_task_regs(next))->dfh = 
!ia64_is_local_fpu_owner(next);*/                        \
-       /* vcpu_set_next_timer(next);  TURN ME BACK ON */                       
                \
        (last) = ia64_switch_to((next));                                        
                 \
+       vcpu_set_next_timer(current);                                           
                \
 } while (0)
 #endif // CONFIG_VTI
 

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