Re: [Xen-ia64-devel] Why metaphysical rid rr0 and rr4 ?

[Tristan Gingold <tgingold@xxxxxxx>]

On Tue, Sep 25, 2007 at 11:01:05AM +0900, Isaku Yamahata wrote:
> On Tue, Sep 25, 2007 at 03:45:03AM +0200, Tristan Gingold wrote:
> 
> > for metaphysical mode, we use two different alternate rids (one for rr0 and
> > one for rr4).  Because they use the same mapping why don't we use the
> > same rid for both rr0 and rr4 ?
> 
> This sounds a good idea.
> 
> 
> > This should avoid duplicate entries in the VHPT.
> 
> VHPT entry includes memory attribute bits(cachable v.s. uncachable).
Yes but the memory attribute is the same.
In PV mode, UC accesses in metaphysical mode is not allowed.
In VTi mode, UC accesses to memory are converted to WB accesses.  UC accesses
 to IO are trapped.

Tristan.

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