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Re: [Xen-ia64-devel] RFC: ptc.ga implementation for SMP-g

To: "Xu, Anthony" <anthony.xu@xxxxxxxxx>, <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
Subject: Re: [Xen-ia64-devel] RFC: ptc.ga implementation for SMP-g
From: Tristan Gingold <Tristan.Gingold@xxxxxxxx>
Date: Tue, 4 Apr 2006 16:02:54 +0100
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Le Mardi 04 Avril 2006 16:47, Xu, Anthony a écrit :
> From: Tristan Gingold
>
> >dtlb and itlb are cleared unconditionnaly.
> >However you are right, the VHPT entry is not the good one.  I think this
> > is a good reason not to do it with the IPI, but to clear directly the
> > entry.
>
> Yes, resetting the rid impacts the performance, that makes IPI method
> worse. I have an idea about handling ptc.ga. But I am not sure whether it
> is feasible.
>
> The control flow is as below
> 1. vcpu1 emulates ptc.ga
> 2. vcpu1 executes vhpt_flush_address to purge current LP VHPT,
>   and executes ptc.l to purge machine TLB on current LPs.
> 3. vcpu1 creates a structure which describe this ptc.ga, including virtual
>   address, address range and rid, and connect this structure to vcpu2.
> 4. then vcpu1 sets a flag in vcpu2, indicating there is ptc.ga executed on
>    this VMM.
> 5. When vcpu2 traps into hypervisor, hypervisor will check whether this
>   flag is set, if yes, vcpu2 will execute vhpt_flush_address and ptc.l.
  6. vcpu1 waits for vcpu2 until it has done the job.

> There is a time window between purges of vcpu1 and vcpu2, I'm not sure
> whether it is workable.
The IPI could makes vcpu2 entering into the hypervisor faster.

Seems Ok for me.

Tristan.



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