Re: [Xen-ia64-devel] vIOSAPIC and IRQs delivery

[Tristan Gingold <Tristan.Gingold@xxxxxxxx>]

Le Mardi 07 Mars 2006 00:34, Dong, Eddie a écrit :
> Magenheimer, Dan (HP Labs Fort Collins) wrote:
> > Hi Tristan --
> >
> > Do you have any more design information?  I'm not very
> > familiar with the x86 implementation but is it your intent
> > for it to be (nearly) identical?  What would be different?
>
> The difference is that should guest OS (para xen) still access the
> IOSAPIC MMIO port?
> If the guest OS keeps accessing the machine IOSAPIC MMIO address,
> multiple driver domain share same IRQ has potential problem. The design
> in my opnion is that hypervisor own the machine IOSAPIC resource
> exclusively including reading IVR and issuing CR.EOI. All the guest is
> working with a pure virtual IOSAPIC or virtual IO_APIC (actually doesn't
> matter for guest).
[Note that IVR and CR.EOI are LSAPIC stuff.]

> > Would all hardware I/O interrupts require queueing by
> > Xen in an event channel?  This seems like it could be
> > a potential high overhead performance issue.
There are two things:
* delivery of IRQs through event channel.  I am not sure about performance 
impact (should be almost the same).  I am sure about linux modification 
impact (new files added, interrupt low-level handling completly modified).

* Use of callback for event channel (instead of an IRQ).
  I suppose it should be slightly faster.  I suppose this is required (for 
speed reasons) if we deliver IRQs through event-channel.

> Mmm, I have different opnion here. With all guest physical IRQ queueing
> by Xen event channel through a bitmap that is shared in para-guest, the
> guest OS no longer needs to access IVR and EOI now, that means we don't
> need to trap into hypervisor. Checking the bitmap is defenitely higher
> performance than read IVR, in this way the performance is improved
> actually.
I really think this is not that obvious due to hyper-privop and 
hyper-reflexion.
  
> In the meantime, we don't need to spend time to re-design the vIOSAPIC,
> it could be same with X86 vIO_APIC (90%). Definitely somebody need to
> write down the vIO_APIC design :-)
>
> Tristan or me can do that, Tristan?
Please start (maybe using some mails we have exchanged).  I will complete if 
necessary.

Tristan.



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