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Re: [Xen-ia64-devel] [PATCH] tlb miss handler

To: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Subject: Re: [Xen-ia64-devel] [PATCH] tlb miss handler
From: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Date: Tue, 21 Feb 2006 10:48:25 +0900
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Hi Kevin. Thanks for your comments.
I will give it a try unless someone gives it a try.

On Mon, Feb 20, 2006 at 11:35:02PM +0800, Tian, Kevin wrote:
> - "alt itlb miss by a guest must be handled"
>       Dom0 runs from the very start with vhpt enabled in all regions. There 
> should be no alt itlb miss raised from dom0.

I thought that dom0 alt itlb miss was intentional because of
the explicit region register initial values.
It is inconsistent that only dom0 boot time is special.
I agree that it is reasonable to modify dom0 start up environment.


>       * Why did you only handle cacheable (meant 0xf000....) area by identity 
> mapping, whole leaving uncacheable (meant 0xe8000...) area to page_fault? 
> That would low down the performance a lot.

Misses on the uncacheable area is handled.
page_fault() and ia64_do_page_fault() doesn't handle misses on the area.
If it wasn't handled by dltb miss handler, misses on the area would result
in dtlb miss/rfi infinite loop.

-- 
yamahata

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