[Xen-ia64-devel] a potential issue in set/get-rse-reg function

["Xu, Anthony" <anthony.xu@xxxxxxxxx>]

Dan,

In current implementation, Guest stack register of current guest
function can be saved in hypervisor backing store or/and guest backing
store, if some saved in guest backing store, set/get-rse-reg will
directly access guest backing store, at this time, tlb miss may happen.
But tlb miss handler only search guest vhpt not guest page table, that
means it is possible hypervisor can't handle this tlb miss and inject
tlb miss to guest kernel, at this situation, I think hypervisor can't
inject tlb miss to guest kernel. 
One explicit solution is in ivt.S set rse to lazy mode before do 'cover'
to make sure guest stack register of current guest function are all
saved in hypervisor backing store. Yes this solution will penalize
performance, but just a little, because there are only about ten
assembly instructions between 'cover' and 'mov ar.rse=0' in current
implementation.
What's your opinion?

Thanks
Anthony.

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