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xen-ia64-devel

[Xen-ia64-devel] RE: rid virtualization

To: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Subject: [Xen-ia64-devel] RE: rid virtualization
From: "Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>
Date: Mon, 5 Sep 2005 07:59:59 -0700
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Thread-topic: rid virtualization
> > This seems very counter-intuitive.  What is the hardware hash
> > algorithm? Surely there is a way to "mangle" rid bits to match this
> > algorithm and use more of the VHPT?

> The hardware hash algrorithm is not public and is 
> implementation specific,

The algorithm for Itanium2 seems to be here (see #8):
http://www.gelato.unsw.edu.au/IA64wiki/ItaniumInternals
If this is correct, the current mangling algorithm seems
like it should work.  I wonder if the virtual addresses
used by Linux are counteracting it?

> I am wondering "mangle" can achieve this, but would like to 
> see this if it can 
> really solve that.
> I remember HP Unix is using Long format VHPT, how do they 
> solve the locality
>  issue (I guess you know more on that)? Do they allocate rid 
> sequentially + 
> mangle or do they allocate rid randomly?

I don't have access to HP-UX source but will see if I can
find out.  Also, there has been a LVHPT implementation on
Linux... perhaps the UNSW folks have some insight into this?

> > Exactly my point.  Don't the high rid bits participate in
> > the hash (especially after mangling), thus more guests would
> > use more of the VHPT?
> No exact data now. But my thinking is that if we swap high 4 
> bits with 
> low 4 bits in previously MACRO, the result is almost same 
> with high bits
> difference. 
> Only real test can prove something, we don't have yet :-(

Yes, perhaps we should revisit this after we have multiple
guests (>10) running solidly.

Dan

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