# HG changeset patch
# User Ian Campbell <ian.campbell@xxxxxxxxxx>
# Date 1306916791 -3600
# Node ID 062bc0a35d9933cc64c11f861609559e11994778
# Parent 253a38db096bdc72b4e266ed103643210a739d93
hvmloader: enable PCI_COMMAND_IO on primary VGA device
There is an implicit assumption in the PCI spec that the primary VGA
device (e.g. something with class==VGA) will have I/O enabled in order
to make the standard VGA I/O registers (e.g. at 0x3xx) available, even
though the device has no explicit I/O BARS.
The qemu device model for the Cirrus VGA card does not actually
enforce this but SeaBIOS looks for a VGA device with I/O enabled
before running the VGA ROM. Coreboot has similar behaviour and I
verified on a physical Cirrus GD 5446 that the BIOS had enable I/O
cycles.
The thread at http://www.seabios.org/pipermail/seabios/2011-May/001804.html
contains more info.
Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
diff -r 253a38db096b -r 062bc0a35d99 tools/firmware/hvmloader/rombios.c
--- a/tools/firmware/hvmloader/rombios.c Wed Jun 01 09:17:55 2011 +0100
+++ b/tools/firmware/hvmloader/rombios.c Wed Jun 01 09:26:31 2011 +0100
@@ -102,6 +102,7 @@ static void rombios_apic_setup(void)
static void rombios_pci_setup(void)
{
uint32_t base, devfn, bar_reg, bar_data, bar_sz, cmd, mmio_total = 0;
+ uint32_t vga_devfn = 256;
uint16_t class, vendor_id, device_id;
unsigned int bar, pin, link, isa_irq;
@@ -146,6 +147,8 @@ static void rombios_pci_setup(void)
{
case 0x0300:
/* If emulated VGA is found, preserve it as primary VGA. */
+ if ( virtual_vga == VGA_none )
+ vga_devfn = devfn;
if ( (vendor_id == 0x1234) && (device_id == 0x1111) )
virtual_vga = VGA_std;
else if ( (vendor_id == 0x1013) && (device_id == 0xb8) )
@@ -307,6 +310,18 @@ static void rombios_pci_setup(void)
cmd |= PCI_COMMAND_IO;
pci_writew(devfn, PCI_COMMAND, cmd);
}
+
+ if ( vga_devfn != 256 )
+ {
+ /*
+ * VGA registers live in I/O space so ensure that primary VGA
+ * has IO enabled, even if there is no I/O BAR on that
+ * particular device.
+ */
+ cmd = pci_readw(vga_devfn, PCI_COMMAND);
+ cmd |= PCI_COMMAND_IO;
+ pci_writew(vga_devfn, PCI_COMMAND, cmd);
+ }
}
/*
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