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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v6 40/44] x86/fpu: Pass explicit xsave areas to fpu_(f)xsave()
From: Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx>
Have the save entry point fetch the vCPU's XSAVE area once, through
the VCPU_MAP_XSAVE_AREA() seam, and pass the resulting pointer down
explicitly: xsave() gains an area parameter in place of its internal
dereference, and fpu_fxsave() takes the legacy region directly. The
lower-level helpers no longer know where a vCPU's save area lives,
which is the property the coming relocation of guest save areas
relies on; the vcpu pointers become const on the way.
No functional change.
Signed-off-by: Alejandro Vallejo <alejandro.vallejo@xxxxxxxxx>
Assisted-by: Claude Code:claude-fable-5
Signed-off-by: George Dunlap <gwd@xxxxxxxxxxxxxx>
---
Revived from "x86: Address Space Isolation FPU preparations" v3 patch
10/12 (<20250110132823.24348-11-alejandro.vallejo@xxxxxxxxx>, Acked-by
Jan Beulich; no v4 was ever posted).
Changes in v5:
- New in this version.
Changes since the previously posted version:
- Regenerated against the eager-FPU-only tree: the entry point is now
vcpu_save_fpu() (vcpu_xsave_mask()/_vcpu_save_fpu() no longer
exist), and the mask is always XSTATE_ALL.
- Expanded the commit message.
---
xen/arch/x86/i387.c | 18 ++++++++++++------
xen/arch/x86/include/asm/xstate.h | 2 +-
xen/arch/x86/xstate.c | 3 +--
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c
index c6796bc97b..65491b5697 100644
--- a/xen/arch/x86/i387.c
+++ b/xen/arch/x86/i387.c
@@ -109,7 +109,8 @@ static inline void fpu_fxrstor(struct vcpu *v)
/*******************************/
/* Save x87 extended state */
-static inline void fpu_xsave(struct vcpu *v)
+static inline void fpu_xsave(const struct vcpu *v,
+ struct xsave_struct *xsave_area)
{
bool ok;
@@ -119,15 +120,14 @@ static inline void fpu_xsave(struct vcpu *v)
*/
ok = set_xcr0(v->arch.xcr0_accum | XSTATE_FP_SSE);
ASSERT(ok);
- xsave(v, XSTATE_ALL);
+ xsave(v, xsave_area, XSTATE_ALL);
ok = set_xcr0(v->arch.xcr0 ?: XSTATE_FP_SSE);
ASSERT(ok);
}
/* Save x87 FPU, MMX, SSE and SSE2 state */
-static inline void fpu_fxsave(struct vcpu *v)
+static inline void fpu_fxsave(const struct vcpu *v, fpusse_t *fpu_ctxt)
{
- fpusse_t *fpu_ctxt = &v->arch.xsave_area->fpu_sse;
unsigned int fip_width = v->domain->arch.x87_fip_width;
if ( fip_width != 4 )
@@ -192,15 +192,21 @@ void vcpu_restore_fpu(struct vcpu *v)
*/
void vcpu_save_fpu(struct vcpu *v)
{
+ struct xsave_struct *xsave_area;
+
ASSERT(!is_idle_vcpu(v));
/* This can happen, if a paravirtualised guest OS has set its CR0.TS. */
clts();
+ xsave_area = VCPU_MAP_XSAVE_AREA(v);
+
if ( cpu_has_xsave )
- fpu_xsave(v);
+ fpu_xsave(v, xsave_area);
else
- fpu_fxsave(v);
+ fpu_fxsave(v, &xsave_area->fpu_sse);
+
+ VCPU_UNMAP_XSAVE_AREA(v, xsave_area);
}
/* Initialize FPU's context save area */
diff --git a/xen/arch/x86/include/asm/xstate.h
b/xen/arch/x86/include/asm/xstate.h
index 0519379edb..40bb6f152e 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -95,7 +95,7 @@ uint64_t get_xcr0(void);
void set_msr_xss(u64 xss);
uint64_t get_msr_xss(void);
uint64_t read_bndcfgu(void);
-void xsave(struct vcpu *v, uint64_t mask);
+void xsave(const struct vcpu *v, struct xsave_struct *ptr, uint64_t mask);
void xrstor(struct vcpu *v, uint64_t mask);
void xstate_set_init(uint64_t mask);
bool xsave_enabled(const struct vcpu *v);
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 2eae3f098d..058bc4c0bc 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -304,9 +304,8 @@ void compress_xsave_states(struct vcpu *v, const void *src,
unsigned int size)
VCPU_UNMAP_XSAVE_AREA(v, xstate);
}
-void xsave(struct vcpu *v, uint64_t mask)
+void xsave(const struct vcpu *v, struct xsave_struct *ptr, uint64_t mask)
{
- struct xsave_struct *ptr = v->arch.xsave_area;
uint32_t hmask = mask >> 32;
uint32_t lmask = mask;
unsigned int fip_width = v->domain->arch.x87_fip_width;
--
2.56.0
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