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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v6 43/44] x86/domain: restore FPU state after switching to the new page tables
__context_switch() restores the incoming vCPU's FPU state
(vcpu_restore_fpu(n)) while still running on the outgoing vCPU's page
tables, before write_ptbase(n). That dereferences n's XSAVE area
through whatever address it happens to have in p's address space --
fine today, when the area is globally mapped, but not once guest XSAVE
state moves to a per-vCPU mapping that need not exist in another vCPU's
address space (upcoming Address Space Isolation work).
Move the eager restore to just after write_ptbase(n), so it runs with
n's page tables loaded. The XCR0/XSS setup stays where it is (it
programs control registers / an MSR, independent of the page tables,
and XSS must be set before the supervisor-state xrstor). Nothing
between the save and the new restore point touches guest FPU state:
the ctxt_switch->to() hooks, psr and GDT handling are all FPU-free,
and Xen is built without SSE.
No functional change with the current global XSAVE-area mapping.
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: George Dunlap <gwd@xxxxxxxxxxxxxx>
---
Changes in v5:
- New in this version.
---
xen/arch/x86/domain.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 66d71ec41b..8222ad9e2a 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -2267,7 +2267,6 @@ static void __context_switch(void)
if ( cpu_has_xsaves && is_hvm_vcpu(n) )
set_msr_xss(n->arch.msrs->xss.raw);
}
- vcpu_restore_fpu(n);
nd->arch.ctxt_switch->to(n);
}
@@ -2283,7 +2282,10 @@ static void __context_switch(void)
write_ptbase(n);
if ( !is_idle_domain(nd) )
+ {
memcpy(stack_regs, vcpu_user_regs(n), CTXT_SWITCH_STACK_BYTES);
+ vcpu_restore_fpu(n);
+ }
#ifdef CONFIG_PV
/* Prefetch the VMCB if we expect to use it later in the context switch */
--
2.56.0
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