From d46eee03ea23327b0a480c03fc227e8eeb6da96a Mon Sep 17 00:00:00 2001
From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Date: Sat, 28 Mar 2015 18:06:47 +0000
Subject: dbg self-ipi


diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index 176f1498e380..cc0ac160ea38 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1265,23 +1265,10 @@ static void cf_check spurious_interrupt(void)
      * Vectored interrupts are ACKed; spurious interrupts are not.
      */
     if (apic_isr_read(SPURIOUS_APIC_VECTOR)) {
-        bool is_spurious;
-
         ack_APIC_irq();
-        is_spurious = !nmi_check_continuation();
-        if (this_cpu(state_dump_pending)) {
-            this_cpu(state_dump_pending) = false;
-            dump_execstate(get_irq_regs());
-            is_spurious = false;
-        }
-
-        if ( !is_spurious )
-            return;
     }
 
-    /* see sw-dev-man vol 3, chapter 7.4.13.5 */
-    printk(KERN_INFO "spurious APIC interrupt on CPU#%d, should "
-           "never happen.\n", smp_processor_id());
+    printk("*** SPIV\n");
 }
 
 /*
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index ac01ba08723d..b35d3ff28857 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2687,3 +2687,76 @@ void asmlinkage entry_from_xen(struct cpu_user_regs *regs)
  * indent-tabs-mode: nil
  * End:
  */
+
+#include <xen/keyhandler.h>
+
+static void cf_check check_self_ipi(void *_)
+{
+    unsigned long flags;
+    uint64_t icr_before, icr_after;
+    uint32_t irr_before, irr_after;
+
+    local_irq_save(flags);
+
+    asm ("mfence;lfence");
+
+    /* Force use of SPURIOUS_APIC_VECTOR, 0xff */
+    apic_wrmsr(APIC_ICR,
+               APIC_DM_FIXED | APIC_DEST_PHYSICAL | SPURIOUS_APIC_VECTOR);
+
+    asm ("mfence;lfence");
+
+    icr_before = apic_rdmsr(APIC_ICR);
+    irr_before = apic_rdmsr(APIC_IRR + (0xf0/32 * 0x10));
+
+    asm ("mfence;lfence");
+
+    /* Send ourselves EVENT_CHECK_VECTOR, 0xfc */
+    apic_wrmsr(APIC_SELF_IPI, EVENT_CHECK_VECTOR);
+
+    asm ("mfence;lfence");
+
+    icr_after = apic_rdmsr(APIC_ICR);
+    irr_after = apic_rdmsr(APIC_IRR + (0xf0/32 * 0x10));
+
+    asm ("mfence;lfence");
+
+    local_irq_restore(flags);
+
+    printk("  Before: ICR %016"PRIx64", IRR %08x\n", icr_before, irr_before);
+    printk("   After: ICR %016"PRIx64", IRR %08x\n", icr_after,  irr_after);
+}
+
+static void cf_check do_extreme_debug(unsigned char key, bool unused)
+{
+    printk("'%c' pressed -> Extreme debugging in progress...\n", key);
+
+    switch ( key )
+    {
+    case '1':
+        if ( !x2apic_enabled )
+        {
+            printk("*** No x2APIC, skipping\n");
+            break;
+        }
+
+        printk("*** Testing self-IPI\n");
+        on_selected_cpus(cpumask_of(0), check_self_ipi, NULL, 1);
+        break;
+
+    case '2':
+        break;
+
+    case '3':
+        break;
+    }
+}
+
+static int __init cf_check extreme_debug_keyhandler_init(void)
+{
+    register_irq_keyhandler('1', &do_extreme_debug, "dbg 1", 0);
+    register_irq_keyhandler('2', &do_extreme_debug, "dbg 2", 0);
+    register_irq_keyhandler('3', &do_extreme_debug, "dbg 3", 0);
+    return 0;
+}
+__initcall(extreme_debug_keyhandler_init);