Re: [PATCH] x86/irq: further gate PIRQ usage for HVM domains

[Jan Beulich <jbeulich@xxxxxxxx>]

On 29.10.2026 11:07, Roger Pau Monne wrote:
> Further restrict PIRQ usage for HVM domains not having the ability to route
> device interrupts over event channels.
> 
> It's still possible for HVM domains without PIRQ support to exercise the
> vector == 0 path in hvm_inject_msi(), which is intended to be used only
> when the guest has PIRQ support.  Taking the PIRQ path in hvm_inject_msi()
> inhibits the local APIC from raising an ESR error when the MSI vector is
> 0, since an MSI with vector == 0 is always processed as a PIRQ.  Introduce
> a has_pirq() check in hvm_inject_msi().
> 
> EVTCHNOP_bind_pirq is also not outright blocked for HVM domains without
> PIRQ support, so guests could attempt to bind device interrupts to event
> channels.  Short-circuit evtchn_bind_pirq() early if the domain has no PIRQ
> support.
> 
> Additionally introduce an assert in map_domain_emuirq_pirq() to ensure it's
> never called from HVM domains without PIRQ support.
> 
> Finally add an extra check in hvm_domain_use_pirq() so it returns false
> unconditionally if the domain has no PIRQ support.  Also convert the
> is_hvm_domain() check into an ASSERT(); this helper is never called against
> a PV domain.
> 
> Fixes: b96b50004804 ("x86: remove XENFEAT_hvm_pirqs for PVHv2 guests")
> Signed-off-by: Roger Pau Monné <roger@xxxxxxxxxxxxxx>

Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>