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Re: [PATCH v2] x86/np2m: flush the np2m on an SVM nested TLB flush
- To: Stephen Cheng <stephen.cheng@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 26 Oct 2026 12:52:07 +0100
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- Cc: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Mon, 26 Oct 2026 11:52:19 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 21.10.2026 04:10, Stephen Cheng wrote:
> On SVM, L1 flushes what is cached from its nested page tables by setting
> TLB_CONTROL or using a new ASID on VMRUN. Either sets nv_flushp2m, which
> p2m_get_nestedp2m_locked() handles by only dropping nv_p2m. Since np2ms
> are shared between vCPUs, the lookup then finds the np2m for the same
> N_CR3 and reuses it as is, so L2 keeps the mappings from before L1 changed
> its NPT.
>
> The obvious fix, flushing nv_p2m (the np2m this vCPU used last) before
> dropping it, is not enough. It covers a vCPU re-entering the same N_CR3,
> but not one entering an N_CR3 whose np2m another vCPU filled: on its
> first VMRUN (nv_p2m is NULL), with an ASID new to it, or when switching
> N_CR3.
>
> Instead, flush the np2m for the incoming N_CR3 before reusing it, as
> nested VMX does via np2m_flush_base() on INVEPT.
>
> Fixes: 6df4b481b0c5 ("x86/np2m: implement sharing of np2m between vCPUs")
> Signed-off-by: Stephen Cheng <stephen.cheng@xxxxxxxxxx>
> Assisted-by: Claude:claude-opus-5-5
> Reviewed-by: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
Tags want ordering differently: For one, it wasn't Ross who indicated that
he used Claude for the review. See docs/process/sending-patched.pandoc. And
then tags want sorting chronologically anyway: You can't possibly sign-off
on a patch before having finished making use of AI assistance.
With that adjusted (can be done while committing):
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
Jan
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