[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH V1 3/8] x86/nestedvmx: Emulate L2 accesses to L1's LAPIC page
- To: xen-devel@xxxxxxxxxxxxxxxxxxxx
- From: chunjie.zhu@xxxxxxxxxx
- Date: Mon, 26 Oct 2026 15:17:49 +0800
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5ZDuCpDYvdU7mV/NT2kdqpjM+lsi+Sd9ryo9lHvaES8=; b=bHHvg0GuxuOkX6wA1uBx4WVvoHxf0aPiwkU/Wv5gC0YrLuGeywnsNQ17vnU7PQKKeD/jaMAs4TUZUNHVVb78B0DfekdT51EWlMor7g/78dB7UHuQ5rtIy2S+Lg5DhwXf1PVEkN3dVjkVqt0ryRxcNVmkoGjPPgA/ZXbSjXqldeBDy0Ya4Iq77Srea6a6NifRZBvIjm4y4LJaXRCyvDJ6rBsdOIxuPzvj8lHqch72/QD0fCifxi9+d7xqw2S4yofReiWq1AoMaaBmzXwLa/IN0ENJctANNGcqIsyV1sJ6vzNDYYY4kIplHtPq2CB/gZqvDyV4LYo6oYU/N+DNZZuGcw==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=g3sh2B1qY6dVYDdvuUQN1Al4Szhw5h3seRh1CuYBbeOlq04/dy2Pd7QAWwmXX91BRX6ZVu2QypIuCXUcuG4ame3D4KWPqFIMJRPSUMDAqLc2ouPHdX5VhxM6ayZDDY7mRpxkMJHYlVM7vrX8CVtavPs7laB4s1/GOkE/qAnRTa5LumHxcfi/uEHx52980VWseuLV8sOy7ZLbd8GWpHWPHtSedfOYMqimPqAUJqFnq+lfhPAjYIbylsoTTyyLmgOytWsSFsnQrDpUfeY1rzuzwOyr366mMsxItYWqigfNlsULb7MBUFTtZ9+2d8kza9qt/sw4w6I2Xl54I//8sMRVUA==
- Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-Id:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
- Authentication-results: mx.microsoft.com 1; dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
- Cc: andrew.cooper3@xxxxxxxxxx, anthony.perard@xxxxxxxxxx, michal.orzel@xxxxxxx, jbeulich@xxxxxxxx, julien@xxxxxxx, roger@xxxxxxxxxxxxxx, sstabellini@xxxxxxxxxx, dpsmith@xxxxxxxxxxxxxxxxxxxx, Chunjie Zhu <chunjie.zhu@xxxxxxxxxx>
- Delivery-date: Mon, 26 Oct 2026 07:18:39 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
From: Chunjie Zhu <chunjie.zhu@xxxxxxxxxx>
Return NESTEDHVM_PAGEFAULT_MMIO when the L0 p2m entry is the APIC-access
page, so that the access faults and is emulated against L1's vLAPIC.
Signed-off-by: Chunjie Zhu <chunjie.zhu@xxxxxxxxxx>
---
xen/arch/x86/mm/hap/nested_hap.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c
index 42d588f08821..72706cebaedf 100644
--- a/xen/arch/x86/mm/hap/nested_hap.c
+++ b/xen/arch/x86/mm/hap/nested_hap.c
@@ -17,6 +17,7 @@
#include <asm/hap.h>
#include <asm/hvm/nestedhvm.h>
+#include <asm/hvm/vmx/vmcs.h>
#include "private.h"
@@ -115,6 +116,17 @@ static int nestedhap_walk_L0_p2m(
mfn = get_gfn_type_access(p2m, L1_gpa >> PAGE_SHIFT, p2mt, p2ma,
0, page_order);
+ /*
+ * With APIC-access virtualisation, Xen backs the LAPIC page of L1 with a
+ * dummy page. L2 must not touch it directly: the access is to L1's
+ * emulated LAPIC, so let the caller emulate it.
+ */
+ rc = NESTEDHVM_PAGEFAULT_MMIO;
+ if ( *p2mt == p2m_mmio_direct && cpu_has_vmx &&
+ !mfn_eq(p2m->domain->arch.hvm.vmx.apic_access_mfn, _mfn(0)) &&
+ mfn_eq(mfn, p2m->domain->arch.hvm.vmx.apic_access_mfn) )
+ goto out;
+
rc = NESTEDHVM_PAGEFAULT_DIRECT_MMIO;
if ( *p2mt == p2m_mmio_direct )
goto direct_mmio_out;
--
2.34.1
|
