[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 1/3] x86/viridian: Workaround Hyper-V GP fault writing to MSR
- To: xen-devel@xxxxxxxxxxxxxxxxxxxx
- From: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
- Date: Fri, 11 Sep 2026 10:12:42 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9Rjk4k8h1rfgiImUL7T5cXwA3eXNjbzwo7Aqi8JVKb0=; b=AL7UoW23+wOmBuBmMSnP3tIowxdRjpBCTAD034uX0Cd9qBr6WurogVEj+PkmmwK92AVsjcmEH7WnvogsO9na1DALL5AZs3uHi9uATDrj83yvtJpRc+DvNwO+nY2dpWWTLG2eNWnwzZrnIejRzP4/sueqZv/1UYOF7eYsa0E/Wcxe9K5BB2uUpv2xnbDZ0WWN8F55UXlcrVhts2KjAU2njZvMJMMgG4R0VvDvuEwyJkwJ47pURJ8TrCN92uBfrgJ8pUCwl4NaDbU+LJHWEb6CqsaBFf8kluGQfsWrTBW3l2/CeeQO806zJcuPc+iLlzlCPtB4W9l1JGtTSpDEALwKgg==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=txQCcSt2vcU3K4xCxS9Zzk+MGmCClGtsurhiICpTtSKXZRcSb0rkAXqzBQtlsI6VNwT1uBKT3igFGd54pj63la65UH34KeRufe2jeOWY6Xb4fP6jr1CMLuO2qdwdfzGsQQcCakryiBXiJlC9hi6lQNsAQhNz4q+ePheSpT7Qag3j6MFuTsO59qGUJnwAK1DosKtkmr6VkGrLxr+BB/dxtHVSG/dqRzITLLPisMp8E+n5YmOCOC8DBU3pOiI9cAXFij3qvxATqClZiTdYpygYALO4W2YKJYS3Cfp2nWFjNkGDk37o6LE4v5cWPo40USsx5IOHyZhwagqC8JkMCWRVqQ==
- Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
- Cc: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>, Paul Durrant <paul@xxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>
- Delivery-date: Fri, 11 Sep 2026 09:13:17 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
The Viridian spec requires the vector to be >= 0x10 when writing to the
SINTx MSR, otherwise it should #GP fault.
The spec-defined initial value is 0x10000, i.e. the vector is 0. On
startup, for some reason Windows 11 Hyper-V tries to set the MSR to
the spec-defined initial value and since the vector is 0, it GP faults.
Fix this by doing as Hyper-V does and only fault if the SINT is
unmasked.
Signed-off-by: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>
---
In v3:
Copy Hyper-V behaviour - only check the vector if not masked.
xen/arch/x86/hvm/viridian/synic.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/viridian/synic.c
b/xen/arch/x86/hvm/viridian/synic.c
index e6cba7548f1b..3125ccca0dcd 100644
--- a/xen/arch/x86/hvm/viridian/synic.c
+++ b/xen/arch/x86/hvm/viridian/synic.c
@@ -157,9 +157,14 @@ int viridian_synic_wrmsr(struct vcpu *v, uint32_t idx,
uint64_t val)
if ( !(viridian_feature_mask(d) & HVMPV_synic) )
return X86EMUL_EXCEPTION;
- /* Vectors must be in the range 0x10-0xff inclusive */
+ /*
+ * Vectors must be in the range 0x10-0xff inclusive unless the vector
+ * is masked since Windows 11 Hyper-V (26H1) has been seen to write
+ * this MSR to its default value, despite not being a spec compliant
+ * value.
+ */
new.as_uint64 = val;
- if ( new.vector < 0x10 )
+ if ( new.vector < 0x10 && !new.masked )
return X86EMUL_EXCEPTION;
/*
--
2.53.0
|
