|
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v6 5/7] xen/igd: use igd header for IGD related definitions
The newly added mocro definitions will be used in a later patch that adds
support for an extended video bios table (VBT) and are mostly derived from
the Linux kernel vfio driver for the Intel IGD.
Also rename XEN_PCI_INTEL_* -> XEN_PCI_IGD_* to make the names of the
macros related to Intel IGD more consistent.
No functional change intended.
Signed-off-by: Chuck Zmudzinski <brchuckz@xxxxxxx>
---
Changes in v6:
- v6 is the first version of the series that has this patch
hw/xen/xen_pt.h | 9 ---------
hw/xen/xen_pt_config_init.c | 8 ++++----
hw/xen/xen_pt_graphics.c | 16 ++++++----------
include/hw/xen/xen_igd.h | 16 ++++++++++++++++
4 files changed, 26 insertions(+), 23 deletions(-)
diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index 095a0f0..ef93ac7 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -87,15 +87,6 @@ typedef int (*xen_pt_conf_byte_read)
#define XEN_PCI_CAP_MAX 48
-#define XEN_PCI_INTEL_OPREGION 0xfc
-
-#define XEN_PCI_IGD_DOMAIN 0
-#define XEN_PCI_IGD_BUS 0
-#define XEN_PCI_IGD_DEV 2
-#define XEN_PCI_IGD_FN 0
-#define XEN_PCI_IGD_SLOT_MASK \
- (1UL << PCI_SLOT(PCI_DEVFN(XEN_PCI_IGD_DEV, XEN_PCI_IGD_FN)))
-
typedef enum {
XEN_PT_GRP_TYPE_HARDWIRED = 0, /* 0 Hardwired reg group */
XEN_PT_GRP_TYPE_EMU, /* emul reg group */
diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index bbc82a2..a708c82 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -1808,7 +1808,7 @@ static const XenPTRegGroupInfo xen_pt_emu_reg_grps[] = {
},
/* Intel IGD Opregion group */
{
- .grp_id = XEN_PCI_INTEL_OPREGION,
+ .grp_id = XEN_PCI_IGD_OPREGION,
.grp_type = XEN_PT_GRP_TYPE_EMU,
.grp_size = 0x4,
.size_init = xen_pt_reg_grp_size_init,
@@ -2023,7 +2023,7 @@ void xen_pt_config_init(XenPCIPassthroughState *s, Error
**errp)
XenPTRegGroup *reg_grp_entry = NULL;
if (xen_pt_emu_reg_grps[i].grp_id != 0xFF
- && xen_pt_emu_reg_grps[i].grp_id != XEN_PCI_INTEL_OPREGION) {
+ && xen_pt_emu_reg_grps[i].grp_id != XEN_PCI_IGD_OPREGION) {
if (xen_pt_hide_dev_cap(&s->real_device,
xen_pt_emu_reg_grps[i].grp_id)) {
continue;
@@ -2036,7 +2036,7 @@ void xen_pt_config_init(XenPCIPassthroughState *s, Error
**errp)
}
}
- if (xen_pt_emu_reg_grps[i].grp_id == XEN_PCI_INTEL_OPREGION) {
+ if (xen_pt_emu_reg_grps[i].grp_id == XEN_PCI_IGD_OPREGION) {
if (!is_igd_vga_passthrough(&s->real_device) ||
s->real_device.vendor_id != PCI_VENDOR_ID_INTEL) {
continue;
@@ -2046,7 +2046,7 @@ void xen_pt_config_init(XenPCIPassthroughState *s, Error
**errp)
* If an intel device is pass through we need to trap 0xfc,
* therefore the size should be 0xff.
*/
- reg_grp_offset = XEN_PCI_INTEL_OPREGION;
+ reg_grp_offset = XEN_PCI_IGD_OPREGION;
}
reg_grp_entry = g_new0(XenPTRegGroup, 1);
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index c5c2d47..be71989 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -12,8 +12,6 @@
static unsigned long igd_guest_opregion;
static unsigned long igd_host_opregion;
-#define XEN_PCI_INTEL_OPREGION_MASK 0xfff
-
typedef struct VGARegion {
int type; /* Memory or port I/O */
uint64_t guest_base_addr;
@@ -251,8 +249,6 @@ uint32_t igd_read_opregion(XenPCIPassthroughState *s)
return val;
}
-#define XEN_PCI_INTEL_OPREGION_PAGES 0x3
-#define XEN_PCI_INTEL_OPREGION_ENABLE_ACCESSED 0x1
void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val)
{
int ret;
@@ -264,15 +260,15 @@ void igd_write_opregion(XenPCIPassthroughState *s,
uint32_t val)
}
/* We just work with LE. */
- xen_host_pci_get_block(&s->real_device, XEN_PCI_INTEL_OPREGION,
+ xen_host_pci_get_block(&s->real_device, XEN_PCI_IGD_OPREGION,
(uint8_t *)&igd_host_opregion, 4);
- igd_guest_opregion = (unsigned long)(val & ~XEN_PCI_INTEL_OPREGION_MASK)
- | (igd_host_opregion &
XEN_PCI_INTEL_OPREGION_MASK);
+ igd_guest_opregion = (unsigned long)(val & ~XEN_PCI_IGD_OPREGION_MASK)
+ | (igd_host_opregion & XEN_PCI_IGD_OPREGION_MASK);
ret = xc_domain_iomem_permission(xen_xc, xen_domid,
(unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
- XEN_PCI_INTEL_OPREGION_PAGES,
- XEN_PCI_INTEL_OPREGION_ENABLE_ACCESSED);
+ XEN_PCI_IGD_OPREGION_PAGES,
+ XEN_PCI_IGD_OPREGION_ENABLE_ACCESSED);
if (ret) {
XEN_PT_ERR(&s->dev, "[%d]:Can't enable to access IGD host opregion:"
@@ -285,7 +281,7 @@ void igd_write_opregion(XenPCIPassthroughState *s, uint32_t
val)
ret = xc_domain_memory_mapping(xen_xc, xen_domid,
(unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT),
(unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
- XEN_PCI_INTEL_OPREGION_PAGES,
+ XEN_PCI_IGD_OPREGION_PAGES,
DPCI_ADD_MAPPING);
if (ret) {
diff --git a/include/hw/xen/xen_igd.h b/include/hw/xen/xen_igd.h
index da51f09..469171c 100644
--- a/include/hw/xen/xen_igd.h
+++ b/include/hw/xen/xen_igd.h
@@ -11,6 +11,22 @@
#ifndef XEN_IGD_H
#define XEN_IGD_H
+#define XEN_PCI_IGD_OPREGION 0xfc
+#define XEN_PCI_IGD_OPREGION_MASK 0xfff
+#define XEN_PCI_IGD_OPREGION_PAGES 0x3
+#define XEN_PCI_IGD_OPREGION_ENABLE_ACCESSED 0x1
+#define XEN_PCI_IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
+#define XEN_PCI_IGD_VBT_SIGNATURE "$VBT"
+#define XEN_PCI_IGD_OPREGION_RVDA 0x3ba
+#define XEN_PCI_IGD_OPREGION_RVDS 0x3c2
+#define XEN_PCI_IGD_OPREGION_VERSION 0x16
+#define XEN_PCI_IGD_DOMAIN 0
+#define XEN_PCI_IGD_BUS 0
+#define XEN_PCI_IGD_DEV 2
+#define XEN_PCI_IGD_FN 0
+#define XEN_PCI_IGD_SLOT_MASK \
+ (1UL << PCI_SLOT(PCI_DEVFN(XEN_PCI_IGD_DEV, XEN_PCI_IGD_FN)))
+
#include "hw/xen/xen-host-pci-device.h"
typedef struct XenPCIPassthroughState XenPCIPassthroughState;
--
2.52.0
|
![]() |
Lists.xenproject.org is hosted with RackSpace, monitoring our |