[PATCH v2 0/6] xen/riscv: fix boot on missing extensions and MMU setup bugs

[Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>]

This series introduces bugs fixes that were found while bringing up CI
support for the HiFive Premier P550 board with a basic smoke test. The
board-support series itself will follow separately as it depends on
PLIC/vPLIC and dom0less support that have not been upstreamed yet. This
series carries only the independent fixes found along the way, none of them
need the board-support series to apply.

This series:
    1: Fix Svade/Svadu A/D bit handling
    2: Set A/D bits in Xen's own page-table mappings under Svade
    3: Make Svpbmt no longer a required extension
    4: Make Zihintpause no longer a required extension
    5: Flush speculatively cached Bare-mode TLB entries in turn_on_mmu()
    6: Fix level_map_mask truncation on load_start

CI pipeline:
https://gitlab.com/xen-project/people/baptleduc/xen/-/pipelines/2836284276

---
Changes since v1:
- address ML comments
- rename some patchs
- add new patch-fix: 242dd1f890e4 ("xen/riscv: fix level_map_mask
  truncation on load_start") discovered when working on Spacemit K3 support

To: Zheng Zhang <Zheng Zhang <zhangzheng@xxxxxxxxxxx>
To: Alistair Francis <alistair.francis@xxxxxxx>
To: Connor Davis <connojdavis@xxxxxxxxx>
To: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
To: Anthony PERARD <anthony.perard@xxxxxxxxxx>
To: Michal Orzel <michal.orzel@xxxxxxx>
To: Jan Beulich <jbeulich@xxxxxxxx>
To: Julien Grall <julien@xxxxxxx>
To: Roger Pau Monné <roger@xxxxxxxxxxxxxx>
To: Stefano Stabellini <sstabellini@xxxxxxxxxx>
Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx

---
Baptiste Le Duc (6):
      xen/riscv: fix Svade/Svadu A/D bit handling
      xen/riscv: set A/D bits in Xen's page-table mappings under Svade
      xen/riscv: make Svpbmt no longer a required extension
      xen/riscv: make Zihintpause no longer a required extension
      xen/riscv: flush speculatively cached Bare-mode TLB entries in 
turn_on_mmu()
      xen/riscv: fix level_map_mask truncation on load_start

 xen/arch/riscv/cpufeature.c             | 61 +++++++++++++++++++++++++++++++--
 xen/arch/riscv/domain.c                 | 10 ++++--
 xen/arch/riscv/include/asm/cpufeature.h |  1 +
 xen/arch/riscv/include/asm/page.h       | 37 ++++++++++++++------
 xen/arch/riscv/include/asm/sbi.h        |  8 +++++
 xen/arch/riscv/mm.c                     | 11 +++---
 xen/arch/riscv/p2m.c                    | 49 ++++++++++----------------
 xen/arch/riscv/riscv64/head.S           |  1 +
 8 files changed, 127 insertions(+), 51 deletions(-)
---
base-commit: f7eab298bb9f2634e555aea1db70efcbbfd4d316
change-id: 20260902-riscv-fix-boot-missing-ext-a79c23bad694

Best regards,
--  
Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>