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Re: [PATCH 5/5] x86/nmi: Don't configure EvtSel repeatedly
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Thu, 6 Aug 2026 08:57:21 +0200
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- Cc: Roger Pau Monné <roger@xxxxxxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Thu, 06 Aug 2026 06:57:33 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 05.08.2026 17:37, Andrew Cooper wrote:
> On 05/08/2026 3:20 pm, Jan Beulich wrote:
>> On 05.08.2026 14:45, Andrew Cooper wrote:
>>> In both setup_{k7,p6}_watchdog(), EvtSel0 is first zeroed, then written with
>>> everything but the enable bit, then written with the enable bit.
>>>
>>> setup_p4_watchdog() is slightly more complicated, owing to what
>>> appears to be a bug introduced by commit 2a2bd8de16b6 ("Clean up NMI
>>> watchdog handler."), which causes a second bit to be temporarily
>>> different too.
>>>
>>> The middle of the three writes is useless in all cases. Drop it.
>> Spotting the 1st write in setup_p4_watchdog() wasn't quite as easy, as
>> MSR_P4_BPU_CCCR0 (as passed to clear_msr_range()) has nothing to do with
>> MSR_P4_IQ_CCCR0. Using unrelated MSR names there is as unhelpful as using
>> raw hex numbers.
>
> Perf counters on the P4 are utterly insane, but our local logic really
> doesn't help matters.
>
> Another option would be to remove P4 watchdog support, in the basis that
> we really can't test it.
Well, my Tulsa system is still alive, and the watchdog looks to be working
there.
Jan
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