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Re: [PATCH v3 2/2] ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller

To: Jiaqing Zhao <Zhao.Jiaqing@xxxxxxx>
From: Stefano Stabellini <sstabellini@xxxxxxxxxx>
Date: Wed, 13 May 2026 13:57:40 -0700 (PDT)
Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References"
Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Julien Grall <julien@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
Delivery-date: Wed, 13 May 2026 20:57:45 +0000
List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Mon, 11 May 2026, Jiaqing Zhao wrote:
> Add a PCI device table entry and matching parameter for the ASIX
> AX99100 PCIe to Multi-I/O controller [125b:9910]. Each port on the
> chip is a standalone PCI function, with UART registers on its I/O
> BAR0.
> 
> Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@xxxxxxx>

Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>

References:
- [PATCH v3 0/2] ns16550: add support for WCH CH382 and ASIX AX99100
  - From: Jiaqing Zhao
- [PATCH v3 2/2] ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller
  - From: Jiaqing Zhao

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