[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown


  • To: "Orzel, Michal" <michal.orzel@xxxxxxx>
  • From: Mykola Kvach <xakep.amatop@xxxxxxxxx>
  • Date: Wed, 22 Apr 2026 18:00:00 +0300
  • Arc-authentication-results: i=1; mx.google.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=tjg9IwgC3tR3fMbuIgriuAtu056atsUqX2gwrY6GQYM=; fh=zL8KVAj6rSaYbk/102rEWeOa69wm5cw+i9nXMzeM8z8=; b=TSGl+xxy84oXPrrtLMHTKkw+wYWycUgCWicBxVcEQXIC2Y5pRhkBaF9URvS6HDC6zF 7R+yoSYb8KEjyWPdefk4FRPfXOAS7YKBCbfmbS7ICzWCvIEmh7qA/kg8rSBcOAemIQud aSe/MmTEpMzUvDqXNkLufrBzdomwoMYJKlmeVvML4ImA5p8jU8UsuxuNkbyMTFLg0xDT 0uc6xDjgJ38omkdVV7yAddAYI+H1QSvDj9KnMBWlr5q8fvXhqqdylqOep3dkSmqhe2z9 3E1cFSsB4gxODRdn65lq3LDk1hhfzrsY+teO69JjamUaVYm4UZnQeo86GMY/4/lyv/Ps tzdg==; darn=lists.xenproject.org
  • Arc-seal: i=1; a=rsa-sha256; t=1776870092; cv=none; d=google.com; s=arc-20240605; b=iPahnxZM8rOR/7LbiUb25qA1gc4xYf4IppJjdmKBybZ3npO93ZeZ6eAdfURLbvcV36 SFD2+20na4QTRZp/p7AoAas1MMb/I7ERBv20blRyOKyDl/JDjgcvT1YKQ2efpWV7uZ5K kTmigdab6TviJpjjukV7qNPaDF1vlATbR8qxDAyDXjYpoJMEVfSFCtjPmm/ilRaTMe0u 4BqdSOOaldmk9JWIIQ/1q+nZ6BfJ3unXzShc41wWy1qReLP7wWVMx8vlzGz6G1hYsH+S mWP8AGdjjVoang76fYolSGuxxvE0QjSSiaJ+6q+L4HQztVPhxwJdOPoP6Aw4gpCm2dzZ qvZg==
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:Cc:To:Subject:Message-ID:Date:From:In-Reply-To:References:MIME-Version"
  • Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx, Mykola Kvach <mykola_kvach@xxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Wed, 22 Apr 2026 15:01:41 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Hi Michal,

Thank you for the review.

On Mon, Apr 20, 2026 at 11:38 AM Orzel, Michal <michal.orzel@xxxxxxx> wrote:
>
> Hmm, this landed in my junk folder.
>
> On 10/04/2026 11:36, Mykola Kvach wrote:
> > From: Mykola Kvach <mykola_kvach@xxxxxxxx>
> >
> > The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR.
> >
> > Per IHI0048B.b section 2.3.1, clearing IRQBypDisGrp{0,1} and
> > FIQBypDisGrp{0,1} selects bypass rather than deasserted interrupt
> > outputs when the CPU interface stops driving them. Tables 2-2 and 2-3
> > show that a zeroed GICC_CTLR can fall back to the legacy IRQ/FIQ inputs
> > instead of fully disabling the interface.
> >
> > Fix this by reading GICC_CTLR, setting the bypass-disable bits, and
> > clearing both group-enable bits before writing the value back. Keep the
> > existing GICC_CTL_ENABLE definition for the init path and use a separate
> > mask for the shutdown-side group-enable handling.
> IIUC we don't need to worry about not setting the bypass-disable bits in cpu
> init (we only set group 0 and EOI) because they are relevant only when the 
> bit 0
> is disabled i.e. the path this patch changes?

Yes, that is my understanding as well.

In cpu_init(), Xen enables the CPU interface by programming
GICC_CTL_ENABLE | GICC_CTL_EOI. In that state, the GIC CPU interface
drives the interrupt outputs, so leaving the bypass-disable bits clear
does not cause fallback to the legacy bypass path.

The issue is specific to cpu_disable(): once the group-enable bits are
cleared, leaving the bypass-disable bits clear can select the legacy
IRQ/FIQ bypass inputs instead of fully deasserting the outputs.

>
> >
> > Section 2.3.2 also states that wakeup event signals remain available
> > even when both GIC interrupt signaling and interrupt bypass are
> > disabled, so disabling bypass does not break the power-management use
> > case, i.e. suspend modes.
> >
> > Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown")
> > Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
> Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
>
> ~Michal
>

Best regards,
Mykola



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.