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[PATCH 1/9] x86/mwait-idle: arrange for BSP MSR adjustments during S3 resume


  • To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Thu, 12 Mar 2026 17:54:30 +0100
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Delivery-date: Thu, 12 Mar 2026 16:54:38 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

mwait_idle_cpu_init() is only called for APs, yet MSR writes will
typically need re-doing post-S3 even for the BSP. When multiple cores /
threads are present (and to come back online) in a package, for package
scope MSRs this may be covered by APs doing the writes, but we can't rely
on that.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/arch/x86/acpi/power.c
+++ b/xen/arch/x86/acpi/power.c
@@ -28,6 +28,7 @@
 #include <asm/io_apic.h>
 #include <asm/irq.h>
 #include <asm/microcode.h>
+#include <asm/mwait.h>
 #include <asm/prot-key.h>
 #include <asm/spec_ctrl.h>
 #include <asm/tboot.h>
@@ -299,6 +300,7 @@ static int enter_state(u32 state)
     acpi_sleep_post(state);
     if ( hvm_cpu_up() )
         BUG();
+    mwait_idle_resume();
     cpufreq_add_cpu(0);
 
  enable_cpu:
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1680,6 +1680,28 @@ static int __init mwait_idle_probe(void)
        return 0;
 }
 
+static void mwait_idle_cpu_tweak(unsigned int cpu)
+{
+       if (icpu->auto_demotion_disable_flags)
+               on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 
1);
+
+       if (icpu->byt_auto_demotion_disable_flag)
+               on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, 
NULL, 1);
+
+       switch (icpu->c1e_promotion) {
+       case C1E_PROMOTION_DISABLE:
+               on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 
1);
+               break;
+
+       case C1E_PROMOTION_ENABLE:
+               on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 
1);
+               break;
+
+       case C1E_PROMOTION_PRESERVE:
+               break;
+       }
+}
+
 static int cf_check mwait_idle_cpu_init(
     struct notifier_block *nfb, unsigned long action, void *hcpu)
 {
@@ -1762,24 +1784,7 @@ static int cf_check mwait_idle_cpu_init(
                dev->count++;
        }
 
-       if (icpu->auto_demotion_disable_flags)
-               on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 
1);
-
-       if (icpu->byt_auto_demotion_disable_flag)
-               on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, 
NULL, 1);
-
-       switch (icpu->c1e_promotion) {
-       case C1E_PROMOTION_DISABLE:
-               on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 
1);
-               break;
-
-       case C1E_PROMOTION_ENABLE:
-               on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 
1);
-               break;
-
-       case C1E_PROMOTION_PRESERVE:
-               break;
-       }
+       mwait_idle_cpu_tweak(cpu);
 
        return NOTIFY_DONE;
 }
@@ -1811,6 +1816,14 @@ int __init mwait_idle_init(struct notifi
        return err;
 }
 
+void mwait_idle_resume(void)
+{
+       if (!icpu)
+               return;
+
+       mwait_idle_cpu_tweak(smp_processor_id());
+}
+
 /* Helper function for HPET. */
 bool __init mwait_pc10_supported(void)
 {
--- a/xen/arch/x86/include/asm/mwait.h
+++ b/xen/arch/x86/include/asm/mwait.h
@@ -14,9 +14,12 @@
 #define MWAIT_ECX_INTERRUPT_BREAK      0x1
 
 void mwait_idle_with_hints(unsigned int eax, unsigned int ecx);
+
 #ifdef CONFIG_INTEL
+void mwait_idle_resume(void);
 bool mwait_pc10_supported(void);
 #else
+static inline void mwait_idle_resume(void) {}
 static inline bool mwait_pc10_supported(void)
 {
     return false;




 


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