[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 4/4] x86/svm: Drop emulation of Intel's SYSENTER behaviour on AMD systems


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Alejandro Vallejo <alejandro.garciavallejo@xxxxxxx>
  • Date: Wed, 11 Mar 2026 10:27:22 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=suse.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0)
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PNrrOymFCnhDiqnrfwMeebp+A/+//ewqO1p99oDlPs4=; b=jLaLueIJeomi5Q3Pj9l2Y5tvTyug70xunrrmetEw2SpTE2hyr3HcN0lnqLElQT2mB93cIbQBd84YyQ/6gR2MuoZP1GalDar9WoBnmHnj0SKDI2mSiw/1fDaYP+YhBU1ulDzwlTcZuW5huy00hGOIAHi7HQ9+f5yXows6FTkv5+rP1Mwky4rXUUzTeL0iLnEUNzfpbdH1IfE4uQ9eL4WiKegc904w7DkTML5LHtrJHYubzy3bBe+lBtHIX3YpZzSDaAumRP5EA+GBFS/muo2lokM/Kj3N4g62AM/PhFevQDHARwOxuSRciPvYf5I1DUZytBz+uB0Artx6rHNMdL1LuQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=L8tIst6WlaYAb0lWAMMJDQc05DwDKFCP3vuEI7xCTRbTv0k/AQ9++zQDqNdI2iTE0ETFPTJZNWC1rw2jW+L4k5nNVdxVa5ApaOwz6IjjlV1KMLbJJ3Pvxwd6BTEBVWJSjOx6S3PjMFPsuxXNGIf/aqWAzQZp+M1nf4NwQ/HrSgKOWbvZoIqL32qrh1KACHCoGw3nUJidWkgels6GyLIPa7TmqAcHoi1Z3HFC0z+AUESa4BFyHLyJWFDxJbSG4b2nLN8sCauK2UR10U8w8gJ871ElMJnd1NtXD8VIbwC3aPzHHuzzWc+1df7UV//8DHhGGc2IW3A9NspilwYqEkmKUw==
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Jason Andryuk <jason.andryuk@xxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Wed, 11 Mar 2026 09:27:37 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Wed Mar 11, 2026 at 9:46 AM CET, Jan Beulich wrote:
> On 13.02.2026 12:42, Alejandro Vallejo wrote:
>> @@ -501,6 +492,9 @@ static void svm_save_cpu_state(struct vcpu *v, struct 
>> hvm_hw_cpu *data)
>>  {
>>      struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
>>  
>> +    data->sysenter_cs      = vmcb->sysenter_cs;
>> +    data->sysenter_esp     = vmcb->sysenter_esp;
>> +    data->sysenter_eip     = vmcb->sysenter_eip;
>>      data->shadow_gs        = vmcb->kerngsbase;
>>      data->msr_lstar        = vmcb->lstar;
>>      data->msr_star         = vmcb->star;
>
> May I suggest to do writes by increasing address order? I.e. while this
> already looks fine, ...
>
>> @@ -512,11 +506,14 @@ static void svm_load_cpu_state(struct vcpu *v, struct 
>> hvm_hw_cpu *data)
>>  {
>>      struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
>>  
>> -    vmcb->kerngsbase = data->shadow_gs;
>> -    vmcb->lstar      = data->msr_lstar;
>> -    vmcb->star       = data->msr_star;
>> -    vmcb->cstar      = data->msr_cstar;
>> -    vmcb->sfmask     = data->msr_syscall_mask;
>> +    vmcb->sysenter_cs  = data->sysenter_cs;
>> +    vmcb->sysenter_esp = data->sysenter_esp;
>> +    vmcb->sysenter_eip = data->sysenter_eip;
>> +    vmcb->kerngsbase   = data->shadow_gs;
>> +    vmcb->lstar        = data->msr_lstar;
>> +    vmcb->star         = data->msr_star;
>> +    vmcb->cstar        = data->msr_cstar;
>> +    vmcb->sfmask       = data->msr_syscall_mask;
>>      v->arch.hvm.guest_efer = data->msr_efer;
>>      svm_update_guest_efer(v);
>>  }
>
> ... your additions would want to move down here (and the other writes may
> then want re-ordering as well). Preferably with that:

Sure.

> Acked-by: Jan Beulich <jbeulich@xxxxxxxx>

Thanks.

Alejandro



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.